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G. J. Wipfler

dblp:13/10968 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1982
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › physical design › placement › analytical placement
force-directed placement		 0.011982
A combined force and cut algorithm for hierarchical VLSI layout · DAC 1982
Electronic design automation › physical design › placement
hierarchical placement		 0.011982
A combined force and cut algorithm for hierarchical VLSI layout · DAC 1982
Electronic design automation › physical design › placement › partitioning-based placement
min-cut placement		 0.011982
A combined force and cut algorithm for hierarchical VLSI layout · DAC 1982
Electronic design automation
physical design		 0.011982
A combined force and cut algorithm for hierarchical VLSI layout · DAC 1982
Electronic design automation › physical design
placement		 0.011982
A combined force and cut algorithm for hierarchical VLSI layout · DAC 1982

Methods — techniques the papers use, named apart from their topics

min-cut partitioning · 0.0force-directed placement · 0.0
YearPublicationVenuePosition
1982 A combined force and cut algorithm for hierarchical VLSI layout
abstract
This paper presents a new algorithm for the initial placement of hierarchical VLSI circuits. The components to be placed are orthogonal macrocells of variable shape and size. This algorithm combines the advantages of force directed placement and min-cut algorithm. It provides an initial placement which avoids overlapping between cells and includes an estimation of routting area. This algorithm is suitable for regular cell arrangements, too.
G. J. Wipfler, Manfred Wiesel, Dieter A. Mlynski
 DAC1