Demo Data from VLDB 2026 / reviewers in the wild / expert
J. R. Isaac
dblp:13/2228
· DBLP profile ↗
3ranked-venue papers
0as first author
0since 2021 · last 1989
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › logic synthesis
datapath optimization |
0.0 | 1 | 1989 | Interface Optimization: An Algorithm for the Detection of Data Path Redundancy and Reconfigurability Towards Obtaining Minimal Bus Interfaces · IEEE Trans. Computers 1989 |
Electronic design automation
high-level synthesis |
0.0 | 1 | 1989 | Interface Optimization: An Algorithm for the Detection of Data Path Redundancy and Reconfigurability Towards Obtaining Minimal Bus Interfaces · IEEE Trans. Computers 1989 |
Electronic design automation › system-level design › communication synthesis
interface synthesis |
0.0 | 1 | 1989 | Interface Optimization: An Algorithm for the Detection of Data Path Redundancy and Reconfigurability Towards Obtaining Minimal Bus Interfaces · IEEE Trans. Computers 1989 |
Electronic design automation
logic synthesis |
0.0 | 1 | 1989 | Interface Optimization: An Algorithm for the Detection of Data Path Redundancy and Reconfigurability Towards Obtaining Minimal Bus Interfaces · IEEE Trans. Computers 1989 |
Methods — techniques the papers use, named apart from their topics
network flow · 0.0graph algorithms · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1989 | Interface Optimization: An Algorithm for the Detection of Data Path Redundancy and Reconfigurability Towards Obtaining Minimal Bus InterfacesabstractInterconnections of submodules of digital systems are normally achieved directly by connecting them to a bus through driver/receiver links. The authors present algorithms for the implementation of data transfer requirements of a system through indirect paths. A formal procedure for identifying the possible candidates for indirect path realization is reported. A procedure is proposed for optimizing the interconnections in a digital system using both indirect and direct paths. It serves as an effective design tool in LSI/VLSI realization of digital systems.> S. S. S. P. Rao, J. R. Isaac |
IEEE Trans. Computers | 2 |
| 1985 | Micro-store width optimization through bit steering
S. S. S. P. Rao, J. R. Isaac |
Microprocessing and Microprogramming | 2 |
| 1980 | Automatic Analysis and Design of Information Processing SystemsabstractBased on a selected set of design criteria, this paper describes a system for computer aided analysis and design of an Information Processing System (IPS). The Scope of the described system is restricted to design of programs and the operating schedule for execution of these programs. The main design criteria used in the formulation of the algorithms for an optimal IPS design include functional design, operational convenience, and minimisation of transport of data. Our approach results in certain advantages over other approaches used in the past. The system described here also generates a scheduler to maintain automatically the status of the design IPS, and to execute automatically appropriate programs. Nandlal L. Sarda, J. R. Isaac |
Comput. J. | 2 |