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Meir Schwarz

dblp:135/6769 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2013
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Storage systems · 50% Memory systems · 50%
Databases, data mining, and information retrieval
1 paper
Transaction processing and concurrency control · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Transaction processing and concurrency control › recovery
write-ahead logging		 0.212013
From ARIES to MARS: transaction support for next-generation, solid-state drives · SOSP 2013
Memory systems › non-volatile memory › persistent memory
byte-addressable persistent memory		 0.212013
From ARIES to MARS: transaction support for next-generation, solid-state drives · SOSP 2013
Memory systems
non-volatile memory		 0.212013
From ARIES to MARS: transaction support for next-generation, solid-state drives · SOSP 2013
Storage systems
non-volatile memory storage		 0.212013
From ARIES to MARS: transaction support for next-generation, solid-state drives · SOSP 2013
Storage systems
transaction support		 0.212013
From ARIES to MARS: transaction support for next-generation, solid-state drives · SOSP 2013

Methods — techniques the papers use, named apart from their topics

write-ahead logging · 0.3
YearPublicationVenuePosition
2013 From ARIES to MARS: transaction support for next-generation, solid-state drives
abstract
Transaction-based systems often rely on write-ahead logging (WAL) algorithms designed to maximize performance on disk-based storage. However, emerging fast, byte-addressable, non-volatile memory (NVM) technologies (e.g., phase-change memories, spin-transfer torque MRAMs, and the memristor) present very different performance characteristics, so blithely applying existing algorithms can lead to disappointing performance.
Joel Coburn, Trevor Bunker, Meir Schwarz, Rajesh K. Gupta 0001, Steven Swanson
 SOSP3