Demo Data from VLDB 2026 / reviewers in the wild / expert
Asanka Abeyweera
dblp:136/7907
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2013
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Performance modeling and evaluation · 67% Memory systems · 33% |
Topics — the 2 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems › cache coherence
false sharing detection |
0.2 | 1 | 2013 | Detection of false sharing using machine learning · SC 2013 |
Performance modeling and evaluation › performance diagnosis
performance bug detection |
0.2 | 1 | 2013 | Detection of false sharing using machine learning · SC 2013 |
Methods — techniques the papers use, named apart from their topics
machine learning · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2013 | Detection of false sharing using machine learningabstractFalse sharing is a major class of performance bugs in parallel applications. Detecting false sharing is difficult as it does not change the program semantics. We introduce an efficient and effective approach for detecting false sharing based on machine learning. Sanath Jayasena, Saman P. Amarasinghe, Asanka Abeyweera, Gayashan Amarasinghe, Himeshi De Silva, Sunimal Rathnayake, Xiaoqiao Meng |
SC | 3 |