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Nicole C. Rodia

dblp:136/7984 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2013
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 77% High-performance computing · 23%
Theoretical computer science
1 paper
Graph algorithms and graph theory · 100%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing
parallel graph algorithms
0.212013
On fast parallel detection of strongly connected components (SCC) in small-world graphs · SC 2013
Graph algorithms and graph theory › graph algorithms › connectivity
strongly connected components
0.212013
On fast parallel detection of strongly connected components (SCC) in small-world graphs · SC 2013

Methods — techniques the papers use, named apart from their topics

parallel SCC detection · 0.3
YearPublicationVenuePosition
2013 On fast parallel detection of strongly connected components (SCC) in small-world graphs
abstract
Detecting strongly connected components (SCCs) in a directed graph is a fundamental graph analysis algorithm that is used in many science and engineering domains. Traditional approaches in parallel SCC detection, however, show limited performance and poor scaling behavior when applied to large real-world graph instances. In this paper, we investigate the shortcomings of the conventional approach and propose a series of extensions that consider the fundamental properties of real-world graphs, e.g. the small-world property. Our scalable implementation offers excellent performance on diverse, small-world graphs resulting in a 5.01x to 29.41x parallel speedup over the optimal sequential algorithm with 16 cores and 32 hardware threads.
Sungpack Hong, Nicole C. Rodia, Kunle Olukotun
SC2