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Brandt Braswell

dblp:137/1534 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2023
0000-0003-2783-8682ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › variation-aware design
mismatch modeling
0.712023
Improvements to Statistical Characterization and Modeling, and a Caution to be Aware of Spurious Correlation in Statistical Simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Integrated circuit design › analog and mixed-signal circuits
analog circuit design
0.212023
Improvements to Statistical Characterization and Modeling, and a Caution to be Aware of Spurious Correlation in Statistical Simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Integrated circuit design
variation-aware design
0.212023
Improvements to Statistical Characterization and Modeling, and a Caution to be Aware of Spurious Correlation in Statistical Simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023

Methods — techniques the papers use, named apart from their topics

statistical simulation · 0.7robust estimation · 0.7
YearPublicationVenuePosition
2023 Improvements to Statistical Characterization and Modeling, and a Caution to be Aware of Spurious Correlation in Statistical Simulation
abstract
This article presents two improvements to, and a warning about a previously unrecognized issue with, statistical modeling, characterization, and simulation. We focus on mismatch, which is key for analog IC design, but the topics addressed are generic. For relative variation (i.e., % difference), we show that conventional measures have significant issues when the variation is large. We present two new measures of % difference between$y_{2}$and$y_{1}$and show that$100 \cdot {\mathrm {ln}} (y_{2} / y_{1})$is the only measure that is physically correct for mismatch. We review existing, but not widely known, robust alternatives to the textbook approach to estimate standard deviation, show the limitations of these, and propose a new method that is intermediate between, and overcomes limitations of, the textbook and robust approaches. We then show how the accuracy of mismatch simulation, critical for analog IC design, is affected by “spurious correlation” between statistical samples; we are not aware that the importance of this has been recognized previously.
Colin C. McAndrew, Mariam Hoseini, Brandt Braswell, Doug Garrity
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3