Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Yong-Jun Lee

dblp:138/8955 · DBLP profile ↗
← Back
2ranked-venue papers
0as first author
0since 2021 · last 2016
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
GPUs and heterogeneous computing · 100%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
dynamic optimization
0.212016
Translating OpenMP device constructs to OpenCL using unnecessary data transfer elimination · SC 2016
GPUs and heterogeneous computing
heterogeneous programming models
0.212016
Translating OpenMP device constructs to OpenCL using unnecessary data transfer elimination · SC 2016
GPUs and heterogeneous computing
GPU computing
0.112016
Translating OpenMP device constructs to OpenCL using unnecessary data transfer elimination · SC 2016
GPUs and heterogeneous computing › GPU communication
host-device data transfer
0.112016
Translating OpenMP device constructs to OpenCL using unnecessary data transfer elimination · SC 2016

Methods — techniques the papers use, named apart from their topics

source-to-source translation · 0.5runtime optimization · 0.5page-fault mechanism · 0.2page fault mechanism · 0.2
YearPublicationVenuePosition
2016 Translating OpenMP device constructs to OpenCL using unnecessary data transfer elimination
abstract
In this paper, we propose a framework that translates OpenMP 4.0 accelerator directives to OpenCL. By translating an OpenMP program to an OpenCL program, the program can be executed on any hardware platform that supports OpenCL. We also propose a run-time optimization technique that automatically eliminates unnecessary data transfers between the host and the target accelerator. It exploits the page-fault mechanism to detect if a copy of the memory object already resides in the accelerator and the copy has not been modified by the host. To evaluate the framework, we develop 17 OpenMP 4.0 benchmark applications in two versions: basic and hand-tuned. By evaluating them on three different GPUs with the original OpenCL and OpenMP programs, we show the effectiveness of the framework. To show the practicality of the framework, we compare the performance of generated OpenCL programs with that of equivalent OpenACC programs compiled by the commercial PGI compiler.
Yong-Jun Lee, Jung-Ho Park, Jaejin Lee
SC2
2015 Scheduling for Better Energy Efficiency on Many-Core Chips
Chanseok Kang, Seungyul Lee, Yong-Jun Lee, Jaejin Lee, Bernhard Egger 0002
JSSPP3