The optimization of regression testing (RT) has been widely studied in the literature, and numerous methods exist. However, each context is unique. Therefore, how to tell which method is appropriate for a specific industrial context? Recent work has proposed a taxonomy to aid in answering this question. The approach is to map both the RT problem and existing solutions onto the taxonomy, aiming to determine which solutions are best aligned with the problem. This paper presents a case study that evaluates the approach in a real setting. The context is the development of R&D projects at a major automotive company, in the domain of connected vehicles. We used the taxonomy to characterize the RT problem in terms of measurable effects, and to identify the technically feasible solutions from a set of 52 papers. We report on the beneficial aspects but also the difficulties of the approach, due to unclear taxonomy elements, missing ones and paper classification errors.

The increasing complexity of embedded applications combined with the advances in chip integration make the design process a very challenging task. Due to this rising complexity, the design under performance, area and consumption constraints of a system-on-a-chip (SOC) composed of mixed software-hardware units, becomes increasingly intricate. This paper presents a method and an associated tool (CODEF) which allow the designer to do an automatic and/or interactive system design space exploration in order to construct cost effective embedded real-time architectures dedicated to complex signal processing applications. The method is based on a recursive partitioning algorithm followed by a communication synthesis procedure.