A reliability evaluation method is proposed for production systems by applying the capacitated-flow production network (CFPN) model. In particular, this article considers in-line stockers to monitor and to avoid blockage and starvation in the CFPN. First, the minimal capacity that all cells (group of machines) should provide to meet demand is generated. Second, status of stocker is monitored via the proposed “stocker volume check table” to calculate the volume usage of a stocker, and the stocker nonutilization is then obtained. Finally, the system reliability is derived in terms of the minimal capacity vector and stocker nonutilization. An important contribution of this article is to avoid complicated dependency calculation when multiple stockers are considered. A practical case of printed circuit board production is further studied to illustrate the applicability of the proposed method.

UNLABELLED: Identification of driver mutations in human diseases is often limited by cohort size and availability of appropriate statistical models. We propose a method for the systematic discovery of genetic alterations that are causal determinants of disease, by prioritizing genes upstream of functional disease drivers, within regulatory networks inferred de novo from experimental data. Here we present the implementation of Driver-gene Inference by Genetical-Genomic Information Theory as an R-system package. AVAILABILITY AND IMPLEMENTATION: The diggit package is freely available under the GPL-2 license from Bioconductor (http://www.bioconductor.org).

A statistical performance simulation (SPS) methodology for VLSI circuits is presented. Traditional methods of worst-case corner analysis lack accuracy and Monte-Carlo simulations cannot be applied to VLSI circuits because of their complexity. SPS methodology is accurate because no statistical information about the device parameter variation is lost. It achieves efficiency by analyzing the smaller circuit blocks and generating the performance distribution for the entire circuit. Circuit evaluation at any specified performance level is possible.

The development of a W-band (75-110 GHz) monolithic receiver, culminating in a three-chip multifunctional monolithic microwave integrated circuit (MMIC) receiver front-end, is described. The heart of the receiver is a four-channel multiplexer, with each channel possessing its own single balanced mixer and low-noise IF amplifier, all integrated onto a single GaAs chip. Two dual-channel monolithic Gunn oscillators with the drive level and spectral parity to meet system requirements have been developed. The key to the development of the monolithic front-end has been to ensure process compatibility between individual components and the careful partitioning of the chip architecture.>