Demo Data from VLDB 2026 / reviewers in the wild / expert
Emilia Rosti
dblp:14/969
· DBLP profile ↗
21ranked-venue papers
7as first author
0since 2021 · last 2003
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Security and privacy · 9Systems, architecture and hardware · 8 · 5 first-authorSoftware engineering, systems software and programming languages · 3 · 3 first-authorComputer networks · 2
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Parallel and multicore computing · 42% Performance modeling and evaluation · 28% Memory systems · 11% |
Topics — the 12 heaviest of 12, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Parallel and multicore computing › parallel computing › parallel program analysis
parallel application characterization |
0.0 | 1 | 2002 | Models of Parallel Applications with Large Computation and I/O Requirements · IEEE Trans. Software Eng. 2002 |
Parallel and multicore computing › parallel scheduling › resource-aware scheduling
i/o-aware scheduling |
0.0 | 1 | 1998 | The Impact of I/O on Program Behavior and Parallel Scheduling · SIGMETRICS 1998 |
Parallel and multicore computing
parallel scheduling |
0.0 | 1 | 1998 | The Impact of I/O on Program Behavior and Parallel Scheduling · SIGMETRICS 1998 |
Electronic design automation › high-level synthesis › scheduling
processor scheduling |
0.0 | 1 | 1998 | Processor Saving Scheduling Policies for Multiprocessor Systems · IEEE Trans. Computers 1998 |
Performance modeling and evaluation › scheduling analysis
scheduling policy evaluation |
0.0 | 1 | 1998 | Processor Saving Scheduling Policies for Multiprocessor Systems · IEEE Trans. Computers 1998 |
Performance modeling and evaluation › performance evaluation methodology
simulation and analytical modeling |
0.0 | 1 | 1998 | Processor Saving Scheduling Policies for Multiprocessor Systems · IEEE Trans. Computers 1998 |
Performance modeling and evaluation
workload characterization |
0.0 | 1 | 2002 | Models of Parallel Applications with Large Computation and I/O Requirements · IEEE Trans. Software Eng. 2002 |
Memory systems
cache coherence |
0.0 | 1 | 1993 | The KSR1: Experimentation and Modeling of Poststore · SIGMETRICS 1993 |
Memory systems › memory architecture
cache-only memory architecture |
0.0 | 1 | 1993 | The KSR1: Experimentation and Modeling of Poststore · SIGMETRICS 1993 |
High-performance computing
parallel i/o |
0.0 | 1 | 1998 | The Impact of I/O on Program Behavior and Parallel Scheduling · SIGMETRICS 1998 |
Cloud and datacenter computing
resource management |
0.0 | 1 | 1998 | The Impact of I/O on Program Behavior and Parallel Scheduling · SIGMETRICS 1998 |
Processor architecture and microarchitecture › multiprocessor architecture
scalable shared-memory multiprocessor |
0.0 | 1 | 1993 | The KSR1: Experimentation and Modeling of Poststore · SIGMETRICS 1993 |
Methods — techniques the papers use, named apart from their topics
simulation · 0.0measurement validation · 0.0analytical modeling · 0.0analytic modeling · 0.0queueing analysis · 0.0experimentation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2003 | How to unwittingly sign non-repudiable documents with Java applicationsabstractDigital signatures allow us to produce documents whose integrity and authenticity, as we generated them, is verifiable by anybody who has access to our public key. Furthermore, we cannot repudiate those documents as something we never saw, let alone signed, since nobody else but us could access our private key. We show how the previous statement can be proved wrong when carefully crafted malicious software is installed on a machine running a Java digital signature application. By using such a software, a user may unwittingly sign another document besides the one he/she intends to digitally sign or sign a different document altogether. Our attack exploits a known vulnerability of the security architecture of the Java run-time environment that allows nonJava malicious software to replace some Java system classes with malicious ones, which then alter the victim application behavior. Danilo Bruschi, D. Fabris, V. Glave, Emilia Rosti |
ACSAC | 4 |
| 2003 | S-ARP: a Secure Address Resolution ProtocolabstractTapping into the communication between two hosts on a LAN has become quite simple thanks to tools that can be downloaded from the Internet. Such tools use the address resolution protocol (ARP) poisoning technique, which relies on hosts caching reply messages even though the corresponding requests were never sent. Since no message authentication is provided, any host of the LAN can forge a message containing malicious information. We present a secure version of ARP that provides protection against ARP poisoning. Each host has a public/private key pair certified by a local trusted party on the LAN, which acts as a certification authority. Messages are digitally signed by the sender, thus preventing the injection of spurious and/or spoofed information. As a proof of concept, the proposed solution was implemented on a Linux box. Performance measurements show that PKI based strong authentication is feasible to secure even low level protocols, as long as the overhead for key validity verification is kept small. Danilo Bruschi, A. Ornaghi, Emilia Rosti |
ACSAC | 3 |
| 2003 | A quantitative study of Public Key Infrastructures
Danilo Bruschi, A. Curti, Emilia Rosti |
Comput. Secur. | 3 |
| 2002 | Voice over IPsec: Analysis and SolutionsabstractIn this paper we present the results of the experimental analysis of the transmission of voice over secure communication links implementing IPsec. Critical parameters characterizing the real-time transmission of voice over an IPsec-ured Internet connection, as well as techniques that could be adopted to overcome some of the limitations of VoIPsec (Voice over IPsec), are presented Our results show that the effective bandwidth can be reduced up to 50% with respect to VoIP in case of VoIPsec. Furthermore, we show that the cryptographic engine may hurt the performance of voice traffic because of the impossibility to schedule the access to it in order to prioritize traffic. We present an efficient solution for packet header compression, which we call cIPsec, for VoIPsec traffic. Simulation results show that the proposed compression scheme significantly reduces the overhead of packet headers, thus increasing the effective bandwidth used by the transmission. In particular, when cIPsec is adopted, the average packet size is only 2% bigger than in the plain case (VoIP), which makes VoIPsec and VoIP equivalent from the bandwidth usage point of view. Roberto Barbieri, Danilo Bruschi, Emilia Rosti |
ACSAC | 3 |
| 2002 | Secure Multicast in Wireless Networks of Mobile Hosts: Protocols and Issues
Danilo Bruschi, Emilia Rosti |
Mob. Networks Appl. | 2 |
| 2002 | Models of Parallel Applications with Large Computation and I/O RequirementsabstractA fundamental understanding of the interplay between computation and I/O activities in parallel applications that manipulate huge amounts of data is critical to achieving good application performance, as well as correctly characterizing the workloads of large-scale high-performance parallel systems. We present a formal model of the behavior of CPU and I/O interactions in scientific applications, from which we derive various formulas that characterize application performance. Our model captures the I/O and CPU activity at different levels of granularity, where results from the model are shown to be in excellent agreement with measurement data from a set of I/O-intensive applications. Using the formulas from our model, which explicitly take I/O activity into account, we also present examples of possible applications of the model. Emilia Rosti, Giuseppe Serazzi, Evgenia Smirni, Mark S. Squillante |
IEEE Trans. Software Eng. | 1 |
| 2001 | Secure pebblenetsabstractWe consider the problem of securing communication in large ad hoc networks, i.e., wireless networks with no fixed, wired infrastructure and with multi-hop routes. Such networks, e.g., networks of sensors, are deployed for applications such as microsensing, monitoring and control, and for extending the peer-to-peer communication capability of smaller group of network users. Because the nodes of these networks, which we term pebbles for their very limited size and large number, are resource constrained, only symmetric key cryptography is feasible. We propose a key management scheme to periodically update the symmetric keys used by all pebbles. By combining mobility-adaptive clustering and an effective probabilistic selection of the key-generating node, the proposed scheme meets the requirements of efficiency, scalability and security needed for the survivability of networks of pebbles (pebblenets) Stefano Basagni, Kris Herrin, Danilo Bruschi, Emilia Rosti |
MobiHoc | 4 |
| 2001 | AngeL: a tool to disarm computer systemsabstractIn this paper we present a tool designed to intercept attacks at the host where they are launched so as to block them before they reach their targets. The tool works both for attacks targeted on the local host and on hosts connected to the network. In the current implementation it can detect and block more than 70 attacks as reported in the literature.The tool is based on the idea of improving the overall security of the Internet by connecting disarmed systems, i.e., hosts that cannot launch attacks against other hosts. Such a strategy was presented in [4]. Here we present an extended version of the tool that has been engineered to consider a wide variety of attacks and to run on various releases of the Linux kernel and the experience learned in building such a tool. A protection mechanism of the tool itself that prevents its removal is also implemented. Experimental results of the impact of the tool on system performance show that the overhead introduced by the tool is negligible from the user's perspective, thus it is not expected to be a hindrance to the successful deployment of the tool. Danilo Bruschi, Emilia Rosti |
NSPW | 2 |
| 2000 | Less Harm, Less Worry or How to Improve Network Security by Bounding System OffensivenessabstractWe describe a new class of tools for protecting computer systems from security attacks. Their distinguished feature is the principle they are based on. Host or network protection is not achieved by strengthening their defenses but by weakening the enemy's offensive capabilities. A prototype tool has been implemented that demonstrates that such an approach is feasible and effective. We show that some of the most popular DoS attacks are effectively blocked with limited impact on the sender's performance. Measurements of the implemented prototype show that controlling the outgoing traffic does not affect performance at the sender machine, when traffic is not hostile. If traffic is hostile, the limited slow down experienced at the source is the price to pay to make the Internet a safer place for all its users. The limited performance impact and the efficacy in attack prevention make tools like the one presented a new component of security architectures. Furthermore, such a type of tools represents an effective way to address security problems that are still unsolved or for which only partial solutions are available, such as the liability problem, intranet security, security tools performance and the use of distributed tools for intrusion. Danilo Bruschi, Lorenzo Cavallaro, Emilia Rosti |
ACSAC | 3 |
| 2000 | Disarming offense to facilitate defenseabstractComputer security has traditionally focused on system defense, concentrating on victim machines protection and recovery. Moving from the opposite perspective, we propose a matching approach that focuses on limiting the attacking capabilities of the hosts. Software design and implementation weaknesses usually are at the basis of computer offensive capacities. Since software redesign or patching on an extensive basis is not possible, we propose the introduction of a filtering strategy to block abuse attempts at the originating machines. As an example, applications of such an approach are presented at network level, in order to prevent popular DoS attacks, among others. The proposed Danilo Bruschi, Emilia Rosti |
NSPW | 2 |
| 1999 | Adding Availability to Log Services of Untrusted MachinesabstractUncorrupted log files are the critical system component for computer forensics in case of intrusion and for real time system monitoring and auditing. Protection from tampering with information can be achieved using cryptographic functions that provide authenticity, integrity, and confidentiality. However, they cannot provide the prerequisite for any further information processing, i.e., information availability. In this case, fault tolerant strategies can be of great help improving information availability in case of accidental or deliberate deletion. In this paper we propose a system that increases log file availability in case of software deletion by reliably and efficiently distributing the logs on multiple independent machines. The proposed scheme is more efficient than simple replication, both from the storage space and the network bandwidth points of view. The proposed system has been implemented and its impact on performance has been measured. Since it operates as a postprocessor after log generation, the proposed system can be easily integrated with logging systems that provide various cryptographic functions for forensic purposes. Arianna Arona, Danilo Bruschi, Emilia Rosti |
ACSAC | 3 |
| 1999 | Performance evaluation of parallel systems
Paolo Cremonesi, Emilia Rosti, Giuseppe Serazzi, Evgenia Smirni |
Parallel Comput. | 2 |
| 1998 | A Tool for Pro-active Defense Against the Buffer Overrun Attack
Danilo Bruschi, Emilia Rosti, R. Banfi |
ESORICS | 2 |
| 1998 | The Impact of I/O on Program Behavior and Parallel SchedulingabstractIn this paper we systematically examine various performance issues involved in the coordinated allocation of processor and disk resources in large-scale parallel computer systems. Models are formulated to investigate the I/O and computation behavior of parallel programs and workloads, and to analyze parallel scheduling policies under such workloads. These models are parameterized by measurements of parallel programs, and they are solved via analytic methods and simulation. Our results provide important insights into the performance of parallel applications and resource management strategies when I/O demands are not negligible. Emilia Rosti, Giuseppe Serazzi, Evgenia Smirni, Mark S. Squillante |
SIGMETRICS | 1 |
| 1998 | A methodology for the evaluation of multiprocessor non-preemptive allocation policies
Evgenia Smirni, Emilia Rosti, Lawrence W. Dowdy, Giuseppe Serazzi |
J. Syst. Archit. | 2 |
| 1998 | Processor Saving Scheduling Policies for Multiprocessor SystemsabstractIn this paper, processor scheduling policies that "save" processors are introduced and studied. In a multiprogrammed parallel system, a "processor saving" scheduling policy purposefully keeps some of the available processors idle in the presence of work to be done. The conditions under which processor saving policies can be more effective than their greedy counterparts, i.e., policies that never leave processors idle in the presence of work to be done, are examined. Sensitivity analysis is performed with respect to application speedup, system size, coefficient of variation of the applications' execution time, variability in the arrival process, and multiclass workloads. Analytical, simulation, and experimental results show that processor saving policies outperform their greedy counterparts under a variety of system and workload characteristics. Emilia Rosti, Evgenia Smirni, Lawrence W. Dowdy, Giuseppe Serazzi, Kenneth C. Sevcik |
IEEE Trans. Computers | 1 |
| 1997 | Queueing Network Models with Two Classes of CustomersabstractSome peculiar properties of multi-class product-form closed queueing networks with two classes of customers are presented. In particular, we show that in a network with two stations there exists a combination of customer classes such that the stations are equally utilized regardless of the population size. Such an equiutilization point is shown to be an optimal operational point at which the system operates at maximum power. Furthermore, it is shown that the equiutilization point belongs to a set of customer populations that lead both stations to saturate simultaneously as the population increases. The edges of such a common saturation sector are also derived and the limit values of the performance measures when the population increases to infinity are obtained. Emilia Rosti, Francesco Schiavoni, Giuseppe Serazzi |
MASCOTS | 1 |
| 1995 | Performance Gains from Leaving Idle Processors in Multiprocessor Systems
Evgenia Smirni, Emilia Rosti, Giuseppe Serazzi, Lawrence W. Dowdy, Kenneth C. Sevcik |
ICPP (3) | 2 |
| 1995 | Analysis of Non-Work-Conserving Processor Partitioning Policies
Emilia Rosti, Evgenia Smirni, Giuseppe Serazzi, Lawrence W. Dowdy |
JSSPP | 1 |
| 1994 | Robust Partitioning Policies of Multiprocessor Systems
Emilia Rosti, Evgenia Smirni, Lawrence W. Dowdy, Giuseppe Serazzi, Brian M. Carlson |
Perform. Evaluation | 1 |
| 1993 | The KSR1: Experimentation and Modeling of PoststoreabstractKendall Square Research introduced the KSR1 system in 1991. The architecture is based on a ring of rings of 64-bit microprocessora. It is a distributed, shared memory system and is scalable. The memory structure is unique and is the key to understanding the system. Different levels of caching eliminates physical memory addressing and leads to the ALLCACHE™ scheme. Since requested data may be found in any of several caches, the initial access time is variable. Once pulled into the local (sub) cache, subsequent access times are fixed and minimal. Thus, the KSR1 is a Cache-Only Memory Architecture (COMA) system.This paper describes experimentation and an analytic model of the KSR1. The focus is on the poststore programmer option. With the poststore option, the programm er can elect to broadcast the updated value of a variable to all processors that might have a copy. This may save time for threads on other processors, but delays the broadcasting thread and places additional traffic on the ring. The specific issue addressed is to determine under what conditions poststore is beneficial. The analytic model and the experimental observations are in good agreement. They indicate that the decision to use poststore depends both on the application and the current system load. Emilia Rosti, Evgenia Smirni, Thomas D. Wagner, Amy W. Apon, Lawrence W. Dowdy |
SIGMETRICS | 1 |