Several modulation and coding advances supported by NASA are summarized. To support long-constraint-length convolutional code, a VLSI maximum-likelihood decoder, utilizing parallel processing techniques, which is being developed to decode convolutional codes of constraint length 15 and a code rate as low as 1/6 is discussed. A VLSI high-speed 8-b Reed-Solomon decoder which is being developed for advanced tracking and data relay satellite (ATDRS) applications is discussed. A 300-Mb/s modem with continuous phase modulation (CPM) and codings which is being developed for ATDRS is discussed. Trellis-coded modulation (TCM) techniques are discussed for satellite-based mobile communication applications.>

A continuous phase quadrature phase shift keyed (CPQPSK) modulation technique is presented. This method utilizes a conventional QPSK modulator and a phase trajectory converter to approximate M=4, h=1/4 continuous phase signal and allows low cost, low complexity, and high rate (>1 Gbit/s) CPM modem implementation for bandwidth efficient transmission through nonlinear satellite channels. Using a communications analysis computer program it has been found that CPQPSK has 99 percent out-of-band power of 0.8R (MSK has 99 percent out-of-band power of 1.2 R where R is defined as bit rate), continuous phase trajectories, and nearly constant envelope amplitude. Simulation of realistic hardware designs indicate that the CPQPSK will require an Eb/No of 14 dB to achieve a bit error rate (BER) of 10/sup -6/. Forward error correcting techniques using block codes with an overhead of 10 percent indicate that the Eb/No requirements can be reduced to 11.2 dB for 10/sup -6/ BER.>

Two examples are provided of the use of microcomputer simulation for computer-aided design and analysis of communication systems: a fixed topology simulation program for digital data links written in Pascal; and a simulation of an analog link using Fortran. Such applications are reported to require a minimum of investment. The new 32-bit single-board computers and their potential impact on microcomputer simulation are discussed.>

Serial minimum-shift keyed (MSK) modulation, a technique for generating and detecting MSK using series filtering, is ideally suited for high data rate applications provided the required conversion and matched filters can be closely approximated. Lowpass implementations of these filters as parallel inphase- and quadrature-mixer structures are characterized in this paper in terms of signal-to-noise ratio (SNR) degradation from ideal and envelope deviation. Several hardware implementation techniques utilizing microwave devices or lumped elements are presented. Optimization of parameter values results in realizations whose SNR degradation is less than 0.5 dB at error probabilities of 10-6.