A Multisource Inverter (MSI) comprises several DC sources in the input that can be combined together with varying voltage levels to operate at different loads to reduce the battery size of electric vehicles. Different multisource inverter configurations have been presented recently in the literature. These structures use two DC sources to operate at different demand loads by using a low battery size. The weakness of these multisource inverters is that they use a high number of power switches. In addition, these structures cannot connect two DC used sources together in series to operate under a heavy load, which increases the battery's size, increases high power losses, and reduces efficiency due to a high number of switches. This paper proposes a new topology for multisource inverters that reduces the power electronics switches and the battery size due to generating four combinations between the two used DC sources in the proposed technique. The proposed multisource topology is controlled by the model predictive due to its popular advantages. The performance of the proposal is verified through simulation results in Matlab. The results show that the MPC is a good alternative for such applications due to its simplicity, high performance, and low harmonic content.

The transformer-based inverters in PV systems increase the weight, size, and cost of the inverter while reducing efficiency. This research presents a new PV inverter topology to increase efficiency using a reduction of dc-link. The proposed multilevel inverter is comprised of six power switches, one discrete diode, and three capacitors to produce five voltage levels. The proposed inverter is connected to a PV panel at input and a local grid at output to inject a sinusoidal current waveform into the grid. To control the grid current, a finite set model predictive control is needed to evaluate the proposed inverter. A comparison study is carried out between the proposal and other five-level inverters to verify the strengths and weaknesses of the proposed multilevel inverter. Finally, to demonstrate the performance of the proposed multilevel inverter, the simulation results are presented in the MATLAB/Simulink environment.

This paper proposes a new multilevel module for the cascaded multilevel inverter configurations. The proposed basic module consists of n number of the conventional two-level inverter connected by series-connection (called a multilevel module MLM) and one power switch with one power diode and are parallel together that generate positive and negative voltage levels. The proposed cascaded multilevel inverter analyzed in both states of symmetric and asymmetric. In order to generate all voltage levels (even and odd) at the output, three new algorithms to determine the magnitude of dc voltage sources proposed. The main advantages of proposed topology are increasing the number of voltage levels at the output with a lower number of power semiconductor switches, driver circuits, and dc voltage sources. Therefore, the proposed topology needs to smaller installation area and lower weight and reduces the total cost of the inverter. Experimental results from a laboratory-scale prototype presented to verify the performance of the proposed multilevel inverter.

This study suggest a new basic structure for symmetric and asymmetric cascaded topologies with reduced number of power electronic components. This topology generates 10 voltage steps by three unequal dc voltage sources and seven switches. The suggested topology creates just positive and zero voltage steps and it needs to one H-bridge to generate negative voltage levels. Based on the located H-bridge, two different cascaded multilevel topologies are proposed. Also, various methods to specify the magnitudes of dc voltage sources are suggested. The proposed cascaded multilevel inverters in comparison with the conventional cascaded topologies and other new topologies which presented in literature decrease the number of components such as, IGBTs, switches, driver circuits and DC links. PSCAD/EMTDC simulations results of 19-level inverter are presented to reconfirm the correct performance of the suggested topologies.

During a few decades many multilevel topologies have been proposed. Contemporary research has engaged for new multilevel inverter topology by unique circuits. This paper presents a new sub-module inverter for cascaded multilevel inverters with reduced number of count. The recommended inverter generates 17 step by four DC links (only two DC link are unequal) and 8 power switches. The suggested sub-module inverter generates all voltage levels (positive, negative and zero) at the output without any additional circuit. Also, a cascaded connection for suggested structure is proposed. The advantages of the suggested cascaded connection are reduction number of components such as semiconductor switches, driver, IGBTs, the variety of the value of DC links and DC links in comparison with classical cascaded structures and other new structures which presented in literatures. For specifying the magnitudes of the DC links three new methods are calculated in order to produce more voltage steps, too. PSCAD/EMTDC simulation outcome are demonstrated to confirm the suggested structure excellent operation.