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Mir Mohammad Navidi

dblp:144/2517 · DBLP profile ↗
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4ranked-venue papers
2as first author
0since 2021 · last 2017
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-authorComputer networks · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Integrated circuit design · 50% Reconfigurable computing and FPGAs · 38% Energy-efficient computing · 12%
Computer networks
2 papers
Internet of things and sensor networks · 100%

Topics — the 3 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › analog and mixed-signal circuits › analog VLSI
field programmable analog array
0.212015
RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform · IPSN 2015
Energy-efficient computing › low-power design
low-power sensing
0.112015
RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform · IPSN 2015
Integrated circuit design › analog and mixed-signal circuits
mixed-signal circuit design
0.112015
RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform · IPSN 2015

Methods — techniques the papers use, named apart from their topics

reconfigurable integrated circuit · 0.4mixed-signal design · 0.4analog signal processing · 0.4
YearPublicationVenuePosition
2017 A regulated charge pump for injecting floating-gate transistors
abstract
Floating-gate transistors have found many applications in both analog and digital systems due to their ability to serve as long-term non-volatile memory. When used in programmable analog applications, the charge on the floating gates must be set very precisely, thereby necessitating precise and steady high voltages to generate programming conditions. In this work, we present a regulated charge pump with extremely low output ripple (2charge pump was fabricated in a 0.35μm standard CMOS process. While operating from a 2.5V supply, this charge pump generates regulated voltages up to 10V.
Mir Mohammad Navidi, David W. Graham
ISCAS1
2017 Below-ground injection of floating-gate transistors for programmable analog circuits
abstract
Floating-gate transistors have been used in many systems to add non-volatile memory. By storing a precise amount of charge on the electrically isolated floating gate, these devices can be used in analog applications as programmable current sources. However, manipulating the stored charge must be done with voltage drops that exceed the supply voltage. In this paper, we present a method to program floating-gate transistors using negative voltages - a desirable characteristic that has been previously inhibited by the difficulties of operating selection circuitry at voltages below the substrate potential. We circumvent the need to have selection circuitry operating at negative voltages by using indirectly programmed floating-gate transistors and a circuit that linearizes the programming currents. We also present a charge pump to generate the necessary negative voltages for programming in this configuration.
Mir Mohammad Navidi, David W. Graham, Brandon Rumberg
ISCAS1
2015 RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform
abstract
To meet the demanding requirements in the growing area of wireless sensing applications, some sensing platforms have included low-power application-specific hardware to process the sensor data for compression and pre-classification of the relevant information. While this additional hardware can reduce the overall power consumption of the system, a unique hardware solution is required for each application. To diminish this burden, we will demonstrate a reconfigurable analog/mixed-signal sensing platform. At the hardware-level, this platform consists of a reconfigurable integrated circuit containing many commonly used circuit components that can be connected in any configuration to perform sensor interfacing and ultra-low-power signal processing. At the software level, this platform provides a framework for abstracting the underlying hardware. We will demonstrate how our platform allows a developer to create applications ranging from standard sensor interfacing techniques to more complicated intelligent pre-processing and wake-up detection, without the necessity of circuit-level expertise.
Brandon M. Kelly, Brandon Rumberg, David W. Graham, Vinodkrishnan Kulathumani, Spencer Clites, Alex Dilello, Mir Mohammad Navidi
IPSN7
2015 RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform
abstract
The requirements of many wireless sensing applications approach, or even exceed, the limited hardware capabilities of energy-constrained sensing platforms. To achieve such demanding requirements, some sensing platforms have included low-power application-specific hardware---at the expense of generality---to pre-process the sensor data for reduction to only the relevant information. While this additional hardware can save power by reducing the activity of the microcontroller and radio, a unique hardware solution is required for each application, which presents an unrealistic burden in terms of design time, cost, and ease of integration. To diminish these burdens, we present a reconfigurable analog/mixed-signal sensing platform in this work. At the hardware-level, this platform consists of a reconfigurable integrated circuit containing many commonly used signal-processing blocks and circuit components that can be connected in any configuration. At the software level, this platform provides a framework for abstracting this underlying hardware. We demonstrate how to quickly develop new applications on this platform, ranging from standard sensor interfacing techniques to more complicated intelligent pre-processing and wake-up detection. We also demonstrate how to integrate this platform with commonly used wireless sensor nodes and embedded-system platforms.
Brandon Rumberg, David W. Graham, Spencer Clites, Brandon M. Kelly, Mir Mohammad Navidi, Alex Dilello, Vinodkrishnan Kulathumani
IPSN5