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Milos Radmanovic

dblp:145/2768 · DBLP profile ↗
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1ranked-venue papers
1as first author
1since 2021 · last 2023
0000-0002-8808-7715ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › logic synthesis › decision diagrams
binary decision diagram
0.712023
Evaluation of Binary Decision Diagrams Complexity Using Relative Arithmetic Width · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Electronic design automation
logic synthesis
0.712023
Evaluation of Binary Decision Diagrams Complexity Using Relative Arithmetic Width · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Electronic design automation › logic synthesis
variable ordering
0.712023
Evaluation of Binary Decision Diagrams Complexity Using Relative Arithmetic Width · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023

Methods — techniques the papers use, named apart from their topics

relative arithmetic width · 0.7
YearPublicationVenuePosition
2023 Evaluation of Binary Decision Diagrams Complexity Using Relative Arithmetic Width
abstract
Many logic synthesis methods are based on the optimization of reduced-order binary decision diagrams (BDDs). The complexity of a BDD greatly depends on the chosen order of variables. Most of the methods find optimal variable ordering focused primarily on some subset of BDD parameters, for example, the size, the number of paths, the average path length, etc. In some cases, there is a need for using several parameters for the evaluation of overall BDD complexity. Therefore, this article proposes a BDD complexity evaluation using the relative arithmetic width (RAW) parameter. This parameter is calculated as the arithmetic mean of the BDD relative widths over all its levels. The RAW expresses the numerical value of the relative shape of the BDD. Experimental results with optimal variable ordering demonstrate the efficiency of the approach.
Milos Radmanovic
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1