Demo Data from VLDB 2026 / reviewers in the wild / expert
Athul Ramkumar
dblp:145/9212
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2014
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware reliability and fault tolerance · 91% Integrated circuit design · 9% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware reliability and fault tolerance
aging and degradation |
0.2 | 1 | 2014 | BTI-Induced Aging under Random Stress Waveforms: Modeling, Simulation and Silicon Validation · DAC 2014 |
Hardware reliability and fault tolerance › aging
bias temperature instability |
0.2 | 1 | 2014 | BTI-Induced Aging under Random Stress Waveforms: Modeling, Simulation and Silicon Validation · DAC 2014 |
Integrated circuit design
analog and mixed-signal circuits |
0.1 | 1 | 2014 | BTI-Induced Aging under Random Stress Waveforms: Modeling, Simulation and Silicon Validation · DAC 2014 |
Methods — techniques the papers use, named apart from their topics
trapping/detrapping model · 0.2silicon validation · 0.2reaction-diffusion model · 0.2compact modeling · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2014 | BTI-Induced Aging under Random Stress Waveforms: Modeling, Simulation and Silicon ValidationabstractThe BTI effect, which consists of both stress and recovery phases, poses a unique challenge to long-term aging prediction, because the degradation rate strongly depends on the stress pattern. Previous approaches usually resort to an average, constant stress waveform to simplify the situation. They are efficient, but fail to capture the reality, especially under dynamic voltage scaling (DVS) or in analog/mixed signal designs where the stress waveform is much more random. This paper presents a suite of solutions that enable aging simulation under all possible stress conditions. Key contributions include: (1) Compact modeling of BTI when the stress voltage is varying. The results to both reaction-diffusion (RD) and trapping/detrapping (TD) mechanisms are derived. (2) Efficient simulation under DVS, leveraging the new BTI models; (3) Silicon validation at 45nm and 65nm, at both device and circuit levels. As the results illustrate, it is necessary to combine both RD and TD mechanisms to accurately predict aging under changing stress voltages. Our proposed work provides a general and comprehensive solution to aging analysis under random stress patterns. Ketul Sutaria, Athul Ramkumar, Rongjun Zhu, Renju Rajveev, Yu Cao 0001 |
DAC | 2 |