In this study high‐performance and high‐speed field‐programmable gate array (FPGA) implementations of polynomial basis Itoh–Tsujii inversion algorithm (ITA) over GF(2 m ) constructed by irreducible trinomials and pentanomials are presented. The proposed structures are designed by one field multiplier and k ‐times squarer blocks or exponentiation by 2 k , where k is a small positive integer. The k ‐times squarer blocks have an efficient tree structure with low critical path delay, and the multiplier is based on a proposed high‐speed digit‐serial architecture with minimum hardware resources. Furthermore, to reduce the computation time of ITA, the critical path of the circuit is broken to finer path using several registers. The computation times of the structure on Virtex‐4 FPGA family are 0.262, 0.192 and 0.271 µs for GF(2 163 ), GF(2 193 ) and GF(2 233 ), respectively. The comparison results with other implementations of the polynomial basis Itoh–Tsujii inversion algorithm verify the improvement in the proposed architecture in terms of speed and performance.

In this study, a low‐power and high performance architecture for finite impulse response digital filter based on the ring topology which is modelled from recurrent neural network is presented. The proposed structure is based on a ring topology reduced number of multipliers, adders and also CLK cycles. In the design, all the operators including multipliers and adders have been designed at gate level. Multiplication is a very important operation in many digital filters hence, the authors designed a novel and modified retiming serial multiplier. To increase the performance, the authors use two types of adders, a proposed high‐speed logarithmic carry look ahead adder and a carry save adder with four inputs. The proposed structure is modelled and verified using FPGA and simulation results. It has been successfully synthesised and implemented with Xilinx ISE 7.1 and Virtex IV FPGA, target device Xc4vf100. The results demonstrate that the proposed method has high performance and low‐power consumption.