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Kanit Therdsteerasukdi

dblp:15/10505 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 2012
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
GPUs and heterogeneous computing · 61% Interconnection networks and networks-on-chip · 30% Energy-efficient computing · 9%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
GPUs and heterogeneous computing › GPU memory
GPU memory hierarchy
0.112012
Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system · ACM Trans. Archit. Code Optim. 2012
GPUs and heterogeneous computing › embedded GPU
mobile GPU
0.112012
Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system · ACM Trans. Archit. Code Optim. 2012
Interconnection networks and networks-on-chip › on-chip interconnect
RF-interconnect
0.112012
Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system · ACM Trans. Archit. Code Optim. 2012
Energy-efficient computing
power management
0.012012
Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system · ACM Trans. Archit. Code Optim. 2012

Methods — techniques the papers use, named apart from their topics

multi-band RF interconnect · 0.1intelligent scheduling · 0.1
YearPublicationVenuePosition
2012 Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system
abstract
Smartphones and tablets are becoming more and more powerful, replacing desktops and laptops as the users' main computing system. As these systems support higher and higher resolutions with more complex 3D graphics, a high-throughput and low-power memory system is essential for the mobile GPU. In this article, we propose to improve throughput/watt in a mobile GPU memory system by using intelligent scheduling to reduce power and multi-band radio frequency interconnect (MRF-I) to offset any throughput degradation caused by our intelligent scheduling. Overall, we are able to improve throughput 17% up to 66% while increasing throughput per watt by an average of 18% up to 26%.
Kanit Therdsteerasukdi, Gyungsu Byun, Jason Cong, Mau-Chung Frank Chang, Glenn Reinman
ACM Trans. Archit. Code Optim.1
2011 The DIMM tree architecture: A high bandwidth and scalable memory system
abstract
The demand for capacity and off-chip bandwidth to DRAM will continue to grow as we integrate more cores onto a die. However, as the data rate of DRAM has increased, the number of DIMMs supported on a multi-drop bus has decreased. Therefore, traditional memory systems are not sufficient to meet both these demands. We propose the DIMM tree architecture for better scalability by connecting the DIMMs as a tree. The DIMM tree architecture is able to grow the number of DIMMs exponentially with each level of latency in the tree. We also propose application of Multiband Radio Frequency Interconnect (MRF-I) to the DIMM tree architecture for even greater scalability and higher throughput. The DIMM tree architecture without MRF-I was able to scale up to 64 DIMMs with only an 8% degradation in throughput over an ideal system. The DIMM tree architecture with MRF-I was able to increase throughput by 68% (up to 200%) on a 64-DIMM system over a 4-DIMM system.
Kanit Therdsteerasukdi, Gyungsu Byun, Jeremy Ir, Glenn Reinman, Jason Cong, Mau-Chung Frank Chang
ICCD1