Min Lee

dblp:15/5536 · DBLP profile ↗
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19ranked-venue papers
11as first author
4since 2021 · last 2026
0000-0001-7576-2614ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 9 · 4 first-author · 1 since 2021Applied, interdisciplinary, general and emerging computing · 3 · 2 first-author · 2 since 2021Computer networks · 2 · 1 first-author · 1 since 2021Security and privacy · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Memory systems · 26% Cloud and datacenter computing · 20% Embedded and real-time systems · 17%
Software engineering, system software, and programming languages
2 papers
Operating systems · 100%
Network and information security
1 paper
Systems and software security · 100%

Topics — the 12 heaviest of 13, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache management
0.112012
Region scheduling: efficiently using the cache architectures via page-level affinity · ASPLOS 2012
Parallel and multicore computing › task scheduling
memory-aware scheduling
0.112012
Region scheduling: efficiently using the cache architectures via page-level affinity · ASPLOS 2012
Embedded and real-time systems › real-time scheduling
multicore scheduling
0.112012
Region scheduling: efficiently using the cache architectures via page-level affinity · ASPLOS 2012
Systems and software security › trusted computing
trusted execution
0.112008
Protectit: trusted distributed services operating on sensitive data · EuroSys 2008
Cloud and datacenter computing
virtualization
0.112008
Protectit: trusted distributed services operating on sensitive data · EuroSys 2008
Cloud and datacenter computing › virtualization › virtualization security
virtual machine isolation
0.112008
Protectit: trusted distributed services operating on sensitive data · EuroSys 2008
Storage systems › buffer management
buffer cache management
0.112007
PABC: Power-Aware Buffer Cache Management for Low Power Consumption · IEEE Trans. Computers 2007
Memory systems
memory management
0.112007
PABC: Power-Aware Buffer Cache Management for Low Power Consumption · IEEE Trans. Computers 2007
Energy-efficient computing › power management
memory power management
0.112007
PABC: Power-Aware Buffer Cache Management for Low Power Consumption · IEEE Trans. Computers 2007
Operating systems › resource management › process management
CPU scheduling
0.012012
Region scheduling: efficiently using the cache architectures via page-level affinity · ASPLOS 2012
Operating systems › resource management
memory management
0.012007
PABC: Power-Aware Buffer Cache Management for Low Power Consumption · IEEE Trans. Computers 2007
Operating systems › resource management › memory management
page migration
0.012007
PABC: Power-Aware Buffer Cache Management for Low Power Consumption · IEEE Trans. Computers 2007

Methods — techniques the papers use, named apart from their topics

virtualization · 0.2dynamic protection rules · 0.2data filters · 0.2simulation · 0.1
YearPublicationVenuePosition
2026 Online and Safe Multiagent RL for Massive Random Access in Tactical Flying Ad Hoc Networks
abstract
In massive random access-based tactical flying adhoc networks (FANETs), the rapid mobility of unmanned aerial vehicles (UAVs) leads to highly dynamic topological changes that frequently cause collisions of control and data packets and ultimately degrade network performance. To address the collision problem, this study proposes an online safe multi-agent reinforcement learning (OSMAR)-based massive random access method, incorporating an artificial Q-adjustment (AQA) mechanism to optimally allocate transmission slots to multiple UAVs within each frame. Specifically, a safe reinforcement learning (RL) technique is employed to design the action selection policy, which balances exploration and exploitation by considering long-term rewards and risks based on a Boltzmann distribution. With this, a blacklist mechanism is incorporated to prevent UAVs from choosing the time slots with high collision risk. Also, the AQA mechanism, composed of an artificial Q-decrement (AQD) that lowers the Q-values of slots already used by other UAVs and an artificial Q-initialization (AQI) that resets the Q-values of idle slots, leverages overheard channel status information to accelerate convergence and enhance adaptation under dynamic network conditions. Extensive simulations demonstrate that the proposed OSMAR method outperforms existing approaches in terms of collision probability, while also enhancing fairness and maintaining robustness under various network conditions.
Jimin Jeon, Jaeha Ahn, Min Lee, Youngbin You, Heejung Yu, Howon Lee 0001
IEEE Internet Things J.3
2023 A Low-Noise 0.001Hz-lkHz Sample-Level Duty-Cycling Neural Recording System-on-Chip
abstract
Multiscale dynamics of neural and metabolic interactions implicated in disease states call for precision electrophysiology to resolve a variety of biopotential signals across the body that cover a wide range of frequencies, from the mHz-range electrogastrogram (EGG) to the kHz-range electroneurogram (ENG). Currently available integrated systems for unobtrusive and minimally invasive electrophysiology suffer from tradeoffs between bandwidth coverage, noise floor, power consumption, and input impedance, which limits their detection range and accuracy. Here we present a 16-channel wide-band ultra-low-noise neural recording system-on-chip fabricated in 65nm CMOS for chronic use in mobile healthcare settings that covers 0.001 Hz to 1 kHz bandwidth through sample-level duty-cycling. Each channel consists of a delta-sigma analog-to-digital converter (ADC) achieving$\mathbf{1.0}\ \mu \mathbf{V}_{rms}$input-referred noise over 1 Hz - 1 kHz bandwidth with a Noise Efficiency Factor (NEF) of 2.93 in continuous operation mode, while power duty-cycling of the biasing and clocks maintains consistent low input-referred noise levels down to 0.001 Hz sampling rates at$\mathbf{435}\ \mathbf{M}\Omega$input impedance. In vivo recordings from the chip interfacing to electrodes mounted on the forehead resolving slow-wave electroencephalogram (EEG) biopotentials demonstrate proof-of-concept functionality.
Jiajia Wu 0008, Abraham Akinin, Min Lee, Akshay Paul, Yongjae Park, Preston Fowler, Seong-Jin Kim, Patrick P. Mercier, Gert Cauwenberghs
ISCAS3
2022 Cultivating and Supporting Learning Analytics Literacy using 3M Analytical Framework
Min Lee, Vwen Yen Lee
ICCE1
2022 Developing Student Agency Through Feedback Seeking Practices in a CSCL environment
Min Lee, Seng Chee Tan
ICCE1
2018 Probabilistic Risk Assessment of Station Blackouts in Nuclear Power Plants
abstract
Adequate ac power is required for decay heat removal in nuclear power plants. Station blackout (SBO) accidents, therefore, are a very critical phenomenon to their safety. Though designed to cope with these incidents, nuclear power plants can only do so for a limited time, without risking core damage and possible catastrophe. Their impact on a plant's safety are determined by their frequency and duration, which quantities, currently, are computed via a static fault tree analysis that deteriorates in applicability with increasing system size and complexity. This paper proposes a novel alternative framework based on a hybrid of Monte Carlo methods, multistate modeling, and network theory. The intuitive framework, which is applicable to a variety of SBOs problems, can provide a complete insight into their risks. Most importantly, its underlying modeling principles are generic, and, therefore, applicable to non-nuclear system reliability problems, as well. When applied to the Maanshan nuclear power plant in Taiwan, the results validate the framework as a rational decision-support tool in the mitigation and prevention of SBOs.
Hindolo George-Williams, Min Lee, Edoardo Patelli
IEEE Trans. Reliab.2
2015 HeteroVisor: Exploiting Resource Heterogeneity to Enhance the Elasticity of Cloud Platforms
abstract
This paper presents HeteroVisor, a heterogeneity-aware hypervisor, that exploits resource heterogeneity to enhance the elasticity of cloud systems. Introducing the notion of 'elasticity' (E) states, HeteroVisor permits applications to manage their changes in resource requirements as state transitions that implicitly move their execution among heterogeneous platform components. Masking the details of platform heterogeneity from virtual machines, the E-state abstraction allows applications to adapt their resource usage in a fine-grained manner via VM-specific 'elasticity drivers' encoding VM-desired policies. The approach is explored for the heterogeneous processor and memory subsystems evolving for modern server platforms, leading to mechanisms that can manage these heterogeneous resources dynamically and as required by the different VMs being run. HeteroVisor is implemented for the Xen hypervisor, with mechanisms that go beyond core scaling to also deal with memory resources, via the online detection of hot memory pages and transparent page migration. Evaluation on an emulated heterogeneous platform uses workload traces from real-world data, demonstrating the ability to provide high on-demand performance while also reducing resource usage for these workloads.
Vishal Gupta 0001, Min Lee, Karsten Schwan
VEE2
2014 Dynamic core affinity for high-performance file upload on Hadoop Distributed File System
Joong-Yeon Cho, Hyun-Wook Jin, Min Lee, Karsten Schwan
Parallel Comput.3
2012 Region scheduling: efficiently using the cache architectures via page-level affinity
abstract
The performance of modern many-core platforms strongly depends on the effectiveness of using their complex cache and memory structures. This indicates the need for a memory-centric approach to platform scheduling, in which it is the locations of memory blocks in caches rather than CPU idleness that determines where application processes are run. Using the term 'memory region' to denote the current set of physical memory pages actively used by an application, this paper presents and evaluates region-based scheduling methods for multicore platforms. This involves (i) continuously and at runtime identifying the memory regions used by executable entities, and their sizes, (ii) mapping these regions to caches to match performance goals, and (iii) maintaining region to cache mappings by ensuring that entities run on processors with direct access to the caches containing their regions. Region scheduling can implement policies that (i) offer improved performance to applications by 'unifying' the multiple caches present on the underlying physical machine and/or by 'balancing' cache usage to take maximum advantage of available cache space, (ii) better isolate applications from each other, particularly when their performance is strongly affected by cache availability, and also (iii) take advantage of standard scheduling and CPU-based load balancing when regioning is ineffective. The paper describes region scheduling and its system-level implementation and evaluates its performance with micro-benchmarks and representative multi-core applications. Single applications see performance improvements of up to 15% with region scheduling, and we observe 40% latency improvements when a platform is shared by multiple applications. Superior isolation is shown to be particularly important for cache-sensitive or real-time codes.
Min Lee, Karsten Schwan
ASPLOS1
2011 On resource block sharing in 3GPP-LTE system
abstract
In this paper, we deal with sharing of a resource block (RB) which is the basic resource allocation unit for scheduling in 3rd-generation partnership project long term evolution (3GPP-LTE) system. In 3GPP-LTE system, a scheduler of evolved node-B (eNB) allocates respectively one or more RBs to user-equipments (UEs) considered, considering their requests, their channel qualities, and the resource availability. In the case of constant-rate service (i.e., the real-time service), some of RBs may not be fully utilized, depending on the channel quality. Especially, in the case of multiple-input multiple-output (MIMO) multiplexing, the degree of resource wastage may become much severer since a much less amount of the resource may be required for the same data rate. In this paper, we introduce the concept of RB sharing where one RB can be shared by multiple UEs depending on their respective required rates and the corresponding channel qualities. Through computer simulations, we evaluate the average sum rates for both cases of RB sharing and non-sharing. From simulation results, we see that the RB sharing scheme can achieve much greater sum rate as compared to the non-sharing one.
Min Lee, Seong Keun Oh
APCC1
2011 Hypervisor-assisted application checkpointing in virtualized environments
abstract
There are two broad categories of approaches used for checkpointing: application-transparent and application-assisted. Typically, application-assisted approaches provide a more flexible and light-weight mechanism but require changes to the application. Although most applications run well under virtualization (e.g. Xen which is being adopted widely), the addition of application-assisted checkpointing - used for high availability - causes performance problems. This is due to the overhead of key system calls used by the checkpointing techniques under virtualization. To overcome this, we introduce the notion of hypervisor-assisted application checkpointing with no changes to the guest operating system. We present the design and a Xen-based implementation of our family of application checkpointing techniques. Our experiments show performance improvements of 4× to 13× in the primitives used for supporting high availability compared to purely user-level approaches.
Min Lee, A. S. Krishnakumar, Parameshwaran Krishnan, Navjot Singh 0001, Shalini Yajnik
DSN1
2011 Symbiotic Scheduling for Shared Caches in Multi-core Systems Using Memory Footprint Signature
abstract
As the trend of more cores sharing common resources on a single die and more systems crammed into enterprise computing space continue, optimizing the economies of scale for a given compute capacity is becoming more critical. One major challenge in performance scalability is the growing L2 cache contention caused by multiple contexts running on a multi-core processor either natively or under a virtual machine environment. Currently, an OS, at best, relies on history based affinity information to dispatch a process or thread onto a particular processor core. Unfortunately, this simple method can easily lead to destructive performance effect due to conflicts in common resources, thereby slowing down all processes. To ameliorate the allocation/management policy of a shared cache on a multi-core, in this paper, we propose Bloom filter signatures, a low-complexity architectural support to allow an OS or a Virtual Machine Monitor to infer cache footprint characteristics and interference of applications, and then perform job scheduling based on symbiosis. Our scheme integrates hardware-level counting Bloom filters in caches to efficiently summarize cache usage behavior on a per-core, per-process or per-VM basis. We then proposed and studied three resource allocation algorithms to determine the optimal process-to-core mapping to minimize interference in the L2. We executed applications using allocation generated by our new process to-core mapping algorithms on an Intel Core 2 Duo machine and showed an averaged 22% (up to 54%) improvement when applications run natively, and an averaged 9.5% improvement (up to 26%)when running inside VMs.
Mrinmoy Ghosh, Ripal Nathuji, Min Lee, Karsten Schwan, Hsien-Hsin S. Lee
ICPP3
2010 XenTune: Detecting Xen Scheduling Bottlenecks for Media Applications
abstract
Virtualization provides enormous economic and ecological benefits by enabling server consolidation and supporting low-cost green data centers. A key component of the hypervisor in a virtualized system is the scheduler. A typical scheduler provides parameters to influence the hypervisor's behavior. Specifically, an application's performance on the popular open-source Xen virtualization platform can be influenced by tuning its scheduler behavior using the weight, cap, and processor pinning variables. However, determining which parameters to tune and how to do that is non-trivial. In this paper, we introduce XenTune, a monitoring tool for the credit scheduler in Xen that helps in understanding application behavior in scheduler terms and assists in determining scheduler parameters. We demonstrate how the tool is used with application domains - specifically a media application domain. We demonstrate experimental results using a real work-load that shows the considerable benefits of correct scheduler parameter choices. XenTune had helped in the design of a recently proposed scheduler S and in this paper we show how scheduler S interacts with the media application to optimize its performance.
Min Lee, A. S. Krishnakumar, Parameshwaran Krishnan, Navjot Singh 0001, Shalini Yajnik
GLOBECOM1
2010 Supporting soft real-time tasks in the xen hypervisor
abstract
Virtualization technology enables server consolidation and has given an impetus to low-cost green data centers. However, current hypervisors do not provide adequate support for real-time applications, and this has limited the adoption of virtualization in some domains. Soft real-time applications, such as media-based ones, are impeded by components of virtualization including low-performance virtualization I/O, increased scheduling latency, and shared-cache contention. The virtual machine scheduler is central to all these issues. The goal in this paper is to adapt the virtual machine scheduler to be more soft-real-time friendly.
Min Lee, A. S. Krishnakumar, Parameshwaran Krishnan, Navjot Singh 0001, Shalini Yajnik
VEE1
2009 An improved incremental frequency reuse scheme employing maximally orthogonal fundamental segments
abstract
We propose an efficient segment assignment strategy for the incremental frequency reuse (IFR) scheme, in which each cell within a cluster of adjoining cells has its own fundamental segment orthogonal to a maximal extent to those of other cells within the cluster, in order to control effectively inter-cell interference (ICI). First, the IFR scheme with maximally orthogonal fundamental segments (MOFS) (hereafter, called as the IFR-MOFS scheme) divides the entire radio spectrum into multiple segments, in which all the cells within the cluster follow the same segmentation rule. Then, it designates a unique MOFS for each cell, distinct from those of other cells within the cluster. Finally, a set of corresponding segment assignment sequences is defined to mitigate ICI within the cluster greatly through systematic segment allocation among adjoining cells. A system-level simulator for an orthogonal frequency division multiple access (OFDMA) cellular system covering surrounding cells up to 3rd-tier has been implemented. Simulation results show that the IFR-MOFS scheme provides quite bett er the cell-edge performance as well as the overall cell capacity a s compared with the original IFR scheme, the soft frequency reuse (SFR) scheme, and the classical universal frequency reuse (UFR) scheme.
Seong Keun Oh, Min Lee
PIMRC3
2009 A Simple Scheduling Algorithm Capable of Controlling Throughput-Fairness Tradeoff
abstract
In this paper, we propose a simple scheduling algorithm that can arbitrarily control the throughput-fairness tradeoff performance in multiuser communication systems. A new scheduling criterion is introduced through a linear combining of two well-known criteria such as the instantaneous channel capacity and the average throughput, with a control factor. Changing the control factor, we can control arbitrarily the scheduling criterion so that a different throughput-fairness tradeoff performance could be achieved, thus for system needs to be dynamically adapted. With an appropriate control factor, the proposed algorithm can substitute the proportional fair (PF) scheduler in terms of the throughput-fairness tradeoff performance. We evaluate the throughput and fairness performance of the proposed algorithm according to the control factors, assuming independent Rayleigh fading multiuser channels.
Min Lee, Seong Keun Oh
VTC Fall1
2008 Protectit: trusted distributed services operating on sensitive data
abstract
Protecting shared sensitive information is a key requirement for today's distributed applications. Our research uses virtualization technologies to create and maintain trusted data paths across distributed machines, for the services being run and their information exchanges. For trusted data paths, runtime protection methods control what data is visible to which distributed services operating on it, guided by online monitoring that determines the levels of trust inherent in the paths' machines, services, and service actions. This paper presents a key functional element of trusted data paths, which is the ProtectIT interception mechanism for controlling the data exchanges between the different virtual machines running trusted services. ProtectIT can be applied to any communication and/or I/O performed by virtual machines, and because ProtectIT does not require application, middleware, or operating system modifications, it can be used to construct trusted data paths without the knowledge or consent of such entities. Further, since ProtectIT operates in virtual machines isolated from those used by applications, it is not subject to the attacks faced by services exposed to the open Internet. ProtectIT's functionality consists of dynamic protection rules represented as data filters applied to virtual machines' communications. Examples presented in this paper include email services for which ProtectIT's filters control data visibility to mail servers and clients, and unsecured virtual machine communications morphed into secure ones via ProtectIT-based message interception.
Jiantao Kong, Karsten Schwan, Min Lee, Mustaque Ahamad
EuroSys3
2008 A Simplified Iterative Water-Filling Algorithm for Per-User Power Allocation in Multiuser MMSE-Precoded MIMO Systems
abstract
In this paper, we deal with a per-user power allocation problem in multiuser multiple input multiple output (MU-MIMO) systems based on minimum mean square error (MMSE) preceding. The MMSE- precoding technique provides a reasonable performance due to minimization of a composite interference-plus-noise power through allowing inter-user interference as well as the higher capacity with multiuser spatial multiplexing. The technique also has a reasonable computational complexity with linear transmit processing. The problem of optimizing per-user power allocation under inter-stream interference is not convex. Hence, we invoke some iterative approaches. In this paper, we propose a simplified iterative water-filling (SIWF) algorithm for per-user optimum power allocation in multiuser MMSE-precoded MIMO systems, in order to maximize the downlink sum capacity. This technique can reduce greatly the computational complexity for the iterative water-filling process through accelerating the iteration process, as compared with the existing modified iterative water-filling (MIWF) algorithm (Wei Yu, 2007), without any performance loss. In the proposed algorithm, both the taxation and interference terms are updated at every iteration of the inner loop of iterative water-filling. In addition, per-user power levels at every iteration for the inner loop are normalized so that the total transmit power constraint could be satisfied, prior to the next iteration. From computer simulations and complexity analyses, we show that the proposed algorithm has much lower complexity but the same capacity, as compared with the original MIWF algorithm.
Min Lee, Seong Keun Oh
VTC Spring1
2007 A Per-User Successive MMSE Precoding Technique in Multiuser MIMO Systems
abstract
We propose a per-user successive minimum mean-squared error (PU-SMMSE) precoding technique suitable for the use in multiuser multiple-input multiple-output (MU-MIMO) downlink systems. Its preceding complexity is much simpler as compared with that of the successive MMSE (SMMSE) technique (V. Stankovic and M. Haardt, 2004), without any performance loss. The new technique also takes both the high capacity benefit achievable with MIMO multiplexing and the benefit of space division multiple access (SDMA), assuming channel state information (CSI) at both the transmitter and receiver sides. In the new technique, the columns of the precoding matrix are obtained by computing successively reduced-rank MMSE precoding solutions on a per-user basis. Then, a per-user virtual channel which consists of the per-user channel through precoding is decomposed into orthogonal transmission modes. Finally, a proper power assignment can be applied to the decomposed modes according to some assignment policy. We compare the proposed technique with the SMMSE technique in terms of the bit error rate (BER) performance. We also analyze the computational complexity of the PU-SMMSE technique in comparison with the SMMSE and BD techniques. From computer simulations and complexity analyses, we see that the PU-SMMSE and SMMSE techniques have the same BER performance in both cases of dominant mode transmission (DMT) and multiple mode transmission (MMT). However, the computational complexity of the proposed technique is much lower than that of the SMMSE technique, and also is lower than that of the simple block diagonalization (BD) technique.
Min Lee, Seong Keun Oh
VTC Spring1
2007 PABC: Power-Aware Buffer Cache Management for Low Power Consumption
abstract
Power consumed by memory systems becomes a serious issue as the size of the memory installed increases. With various low power modes that can be applied to each memory unit, the operating system can reduce the number of active memory units by collocating active pages onto a few memory units. This paper presents a memory management scheme based on this observation, which differs from other approaches in that all of the memory space is considered, while previous methods deal only with pages mapped to user address spaces. The buffer cache usually takes more than half of the total memory and the pages access patterns are different from those in user address spaces. Based on an analysis of buffer cache behavior and its interaction with the user space, our scheme achieves up to 63 percent more power reduction. Migrating a page to a different memory unit increases memory latencies, but it is shown to reduce the power consumed by an additional 4.4 percent
Min Lee, Euiseong Seo, Joonwon Lee, Jin-Soo Kim 0001
IEEE Trans. Computers1