In this article, we propose a flexible and parallelizable hardware architecture of the channel encoding chain for the fifth generation new radio (5G NR) physical downlink control channel (PDCCH). We propose a new polar encoder architecture based on the radix-k processing and fast Fourier transform (FFT) concepts. We also introduce the hardware architectures for cyclic redundancy check (CRC) interleaver and rate matcher for 5G NR PDCCH. We synthesized this complete channel encoding chain on a Virtex Ultrascale+ field-programmable gate-array (FPGA) and show that with the proposed architecture, a codeword throughput of 4.26 Gbps can be realized while consuming as little as 3% of FPGAs resources. The proposed polar encoding architecture can encode from 84 up to 164 resource blocks in the 5G NR frame structure. Encoding of multiple resource blocks can be systematically applied to highly dense (time and frequency) 5G NR fronthaul links supporting multiple antennas.

The optical fiber multiple-input multiple-output (MIMO) channel with intensity modulation and direct detection (IM/DD) per spatial path is treated. The spatial dimensions represent the multiple modes employed for transmission and the cross-talk between them originates in the multiplexers and demultiplexers, which are polarization dependent and thus time-varying. The upper bounds from free-space IM/DD MIMO channels are adapted to the fiber case, and the constellation constrained capacity is constructively estimated using the Blahut-Arimoto algorithm. An autoencoder is then proposed to optimize a practical MIMO transmission in terms of pre-coder and detector assuming channel distribution knowledge at the transmitter. The pre-coders are shown to be robust to changes in the channel.

This paper proposes a new probabilistic amplitude shaping (PAS) approach for concatenated two-level multi-level coding (MLC). The proposed system is based on a concatenated forward error correction (FEC) scheme where outer codes are serially concatenated with inner two-level MLC. This concatenated two-level MLC scheme has recently been shown to have a potential for achieving better performance-complexity trade-offs than the conventional bit-interleaved coded modulation (BICM). Meanwhile, PAS has recently been demonstrated to offer remarkable performance gains as well as rate adaptivity. However, the majority of existing works on PAS assume the use of the binary reflected Gray code as a bit-labeling, and its application to coded modulation schemes with other bit-labelings, such as two-level MLC, may not be straightforward. In this paper, we devise a bit-labeling scheme and propose a new PAS structure for an efficient integration of PAS with two-level MLC systems. More specifically, we propose to generatesignedamplitude symbols with the distribution matcher (DM) for maximizing both coding and shaping gains achieved by two-level MLC and PAS, respectively, while the conventional PAS generatesunsignedamplitude symbols. It is demonstrated by simulation results that, with 256QAM and inner polar codes, the proposed two-level MLC with PAS simultaneously offers 75% reduction in the number of required inner encoding and soft-decision (SD) decoding operations for given outer and inner FEC code lengths, and up to 0.3 dB performance gain over the conventional PAS scheme.

In this work, a multilevel coding (MLC) based coded modulation scheme with two degrees of freedom in rate flexibility is proposed and compared with a bit-interleaved coded modulation (BICM) scheme from a performance versus complexity perspective. The proposed MLC scheme is based on a rate flexible inner soft-decision polar code and utilizes an outer hard-decision staircase code structure as in the 400ZR concatenated forward error-correcting code. The performance of the MLC scheme is investigated for a range of inner code lengths, inner decoder list sizes, and signaling with 16 and 64 quadrature amplitude modulation, respectively. The MLC is designed such that a portion of the staircase encoded bits can bypass the inner code. The number of required inner soft-decision decoders can thus be reduced, thereby saving computational complexity. The proposed MLC scheme simultaneously offers up to a 53.7% reduction in the number of inner decoders and up to 0.55 dB of performance improvement when compared with the similar BICM approach.

In this paper, we consider fast decoding of soft-decision (SD) Hamming codes as inner codes in concatenated forward error-correction (FEC) schemes for high-speed optical communication. The goal is single FPGA implementations at speeds of 400 Gb/s and beyond. A low complexity maximum a posteriori (MAP) probability decoding is applied to a (128,120) Hamming code. Chase decoding of a (128,119) Hamming code is also implemented. The VHDL designs for both decoding schemes are presented. The FEC performance and FPGA resource utilization are investigated and compared. Synthesis results indicate that, both the Chase and the MAP decoder leave sufficient resources available to also accommodate a powerful outer hard decision code, on a single FPGA. Furthermore, MAP decoding of (128,120) Hamming code features lower hardware complexity and provides a higher data throughput.

A family of texture-based generative models for fingerprint images is proposed. The generative models are used to estimate upper bounds on the image entropy for systems with small sensor acquisition. The identification capacity of such systems is then estimated using the mutual information between different samples from the same finger. Similar to the generative model for entropy estimation, pixel-level model families are proposed for estimating the similarity between fingerprint images with a given global affine transformation. These models are used for mutual information estimation, and are also adopted to compensate for local deformations between samples. Finally, it is shown that sensor sizes as small as 52 × 52 pixels are potentially sufficient to discriminate populations as large as the entire world population that ever lived, given that the complexity-unconstrained recognition algorithm is available which operates on the lowest possible pixel level.

In this paper the capacity of a Multiple Input Multiple Output (MIMO) channel is considered, subject to average power constraint, for multi-dimensional discrete input, in the case when no channel state information is available at the transmitter. We prove that when the constellation size grows, the QAM constrained capacity converges to Gaussian capacity, directly extending the AWGN result from [1]. Simulations show that for a given constellation size, a rate close to the Gaussian capacity can be achieved up to a certain SNR point, which can be found efficiently by optimizing the constellation for the equivalent orthogonal channel, obtained by the singular value decomposition. Furthermore, lower bounds on the constrained capacity are derived for the cases of square and tall MIMO matrix, by optimizing the constellation for the equivalent channel, obtained by QR decomposition.

In this paper the problem of constellation shaping is considered. Mapping functions are designed for a many-to-one signal shaping strategy, combined with a turbo coded Bit-interleaved Coded Modulation (BICM), based on symmetric Huffman codes with binary reflected Gray-like properties. An algorithm is derived for finding the Huffman code with such properties for a variety of alphabet sizes, and near-capacity performance is achieved for a wide SNR region by dynamically choosing the optimal code rate, constellation size and mapping function based on the operating SNR point and assuming perfect channel quality estimation. Gains of more than 1dB are observed for high SNR compared to conventional turbo coded BICM, and it is shown that the mapping functions designed here significantly outperform current state of the art Turbo-Trellis Coded Modulation and other existing constellation shaping methods.