Alexey Bakhirkin

dblp:150/7773 · DBLP profile ↗
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9ranked-venue papers
8as first author
1since 2021 · last 2024
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 6 · 6 first-authorTheory of computation · 2 · 1 first-author · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
YearPublicationVenuePosition
2024 Mining of extended signal temporal logic specifications with ParetoLib 2.0
abstract
Abstract Cyber-physical systems are complex environments that combine physical devices (i.e., sensors and actuators) with a software controller. The ubiquity of these systems and dangers associated with their failure require the implementation of mechanisms to monitor, verify and guarantee their correct behaviour. This paper presents ParetoLib 2.0, a Python tool for offline monitoring and specification mining of cyber-physical systems. ParetoLib 2.0 uses signal temporal logic (STL) as the formalism for specifying properties on time series. ParetoLib 2.0 builds upon other tools for evaluating and mining STL expressions, and extends them with new functionalities. ParetoLib 2.0 implements a set of new quantitative operators for trace analysis in STL, a novel mining algorithm and an original graphical user interface. Additionally, the performance is optimised with respect to previous releases of the tool via data-type annotations and multi core support. ParetoLib 2.0 allows the offline verification of STL properties as well as the specification mining of parametric STL templates. Thanks to the implementation of the new quantitative operators for STL, the tool outperforms the expressiveness and capabilities of similar runtime monitors.
Akshay Mambakam, José Ignacio Requeno, Alexey Bakhirkin, Nicolas Basset, Thao Dang 0001
Formal Methods Syst. Des.3
2019 Specification and Efficient Monitoring Beyond STL
abstract
An appealing feature of Signal Temporal Logic (STL) is the existence of efficient monitoring algorithms both for Boolean and real-valued robustness semantics, which are based on computing an aggregate function (conjunction, disjunction, min, or max) over a sliding window. On the other hand, there are properties that can be monitored with the same algorithms, but that cannot be directly expressed in STL due to syntactic restrictions. In this paper, we define a new specification language that extends STL with the ability to produce and manipulate real-valued output signals and with a new form of until operator. The new language still admits efficient offline monitoring, but also allows to express some properties that in the past motivated researchers to extend STL with existential quantification, freeze quantification, and other features that increase the complexity of monitoring.
Alexey Bakhirkin, Nicolas Basset
TACAS (2)1
2018 The first-order logic of signals: keynote
abstract
Formalizing properties of systems with continuous dynamics is a challenging task. In this paper, we propose a formal framework for specifying and monitoring rich temporal properties of real-valued signals. We introduce signal first-order logic (SFO) as a specification language that combines first-order logic with linear-real arithmetic and unary function symbols interpreted as piecewise-linear signals. We first show that while the satisfiability problem for SFO is undecidable, its membership and monitoring problems are decidable. We develop an offline monitoring procedure for SFO that has polynomial complexity in the size of the input trace and the specification, for a fixed number of quantifiers and function symbols. We show that the algorithm has computation time linear in the size of the input trace for the important fragment of bounded-response specifications interpreted over input traces with finite variability. We can use our results to extend signal temporal logic with first-order quantifiers over time and value parameters, while preserving its efficient monitoring. We finally demonstrate the practical appeal of our logic through a case study in the micro-electronics domain.
Alexey Bakhirkin, Thomas Ferrère, Thomas A. Henzinger, Dejan Nickovic
EMSOFT1
2018 Efficient Parametric Identification for STL
abstract
We describe a new algorithm for the parametric identification problem for signal temporal logic (STL), stated as follows. Given a dense-time real-valued signal w and a parameterized temporal logic formula φ, compute the subset of the parameter space that renders the formula satisfied by the signal. Unlike previous solutions, which were based on search in the parameter space or quantifier elimination, our procedure works recursively on φ and computes the evolution over time of the set of valid parameter assignments. This procedure is similar to that of monitoring or computing the robustness of φ relative to w. Our implementation and experiments demonstrate that this approach can work well in practice.
Alexey Bakhirkin, Thomas Ferrère, Oded Maler
HSCC1
2018 Extending Constraint-Only Representation of Polyhedra with Boolean Constraints
Alexey Bakhirkin, David Monniaux
SAS1
2017 Combining Forward and Backward Abstract Interpretation of Horn Clauses
Alexey Bakhirkin, David Monniaux
SAS1
2016 Finding Recurrent Sets with Backward Analysis and Trace Partitioning
Alexey Bakhirkin, Nir Piterman
TACAS1
2015 A Forward Analysis for Recurrent Sets
Alexey Bakhirkin, Josh Berdine, Nir Piterman
SAS1
2014 Backward Analysis via over-Approximate Abstraction and under-Approximate Subtraction
Alexey Bakhirkin, Josh Berdine, Nir Piterman
SAS1