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Keisuke Nakagawa

dblp:151/9379 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2014
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2Artificial intelligence and machine learning · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Artificial intelligence
1 paper
Motion planning and robot control · 56% Robot manipulation · 44%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 83% Memory systems · 17%

Topics — the 11 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Robotics › Robot manipulation
grasping
0.212014
Autonomous multilateral debridement with the Raven surgical robot · ICRA 2014
Robotics › Motion planning and robot control
motion planning
0.212014
Autonomous multilateral debridement with the Raven surgical robot · ICRA 2014
Robotics › Robot manipulation › medical robotics
surgical robotics
0.212014
Autonomous multilateral debridement with the Raven surgical robot · ICRA 2014
Robotics › Motion planning and robot control
trajectory optimization
0.212014
Autonomous multilateral debridement with the Raven surgical robot · ICRA 2014
Robotics › Motion planning and robot control › robot control
model predictive control
0.112014
Autonomous multilateral debridement with the Raven surgical robot · ICRA 2014
Robotics › Motion planning and robot control
robot control
0.112014
Autonomous multilateral debridement with the Raven surgical robot · ICRA 2014
Integrated circuit design
digital circuit design
0.011960
Esaki Diode High-Speed Logical Circuits · IRE Trans. Electron. Comput. 1960
Integrated circuit design › digital circuit design › logic design
logic circuits
0.011960
Esaki Diode High-Speed Logical Circuits · IRE Trans. Electron. Comput. 1960
Integrated circuit design › digital circuit design › logic families
tunnel diode logic circuits
0.011960
Esaki Diode High-Speed Logical Circuits · IRE Trans. Electron. Comput. 1960
Memory systems
delay-line memory
0.011960
Esaki Diode High-Speed Logical Circuits · IRE Trans. Electron. Comput. 1960
Memory systems › random-access memory
dynamic memory
0.011960
Esaki Diode High-Speed Logical Circuits · IRE Trans. Electron. Comput. 1960

Methods — techniques the papers use, named apart from their topics

trajectory optimization · 0.2stereo vision · 0.2model predictive control · 0.2subharmonic oscillator · 0.0majority logic · 0.0
YearPublicationVenuePosition
2014 Autonomous multilateral debridement with the Raven surgical robot
abstract
Autonomous robot execution of surgical sub-tasks has the potential to reduce surgeon fatigue and facilitate supervised tele-surgery. This paper considers the sub-task of surgical debridement: removing dead or damaged tissue fragments to allow the remaining healthy tissue to heal. We present an autonomous multilateral surgical debridement system using the Raven, an open-architecture surgical robot with two cable-driven 7 DOF arms. Our system combines stereo vision for 3D perception with trajopt, an optimization-based motion planner, and model predictive control (MPC). Laboratory experiments involving sensing, grasping, and removal of 120 fragments suggest that an autonomous surgical robot can achieve robustness comparable to human performance. Our robot system demonstrated the advantage of multilateral systems, as the autonomous execution was 1.5× faster with two arms than with one; however, it was two to three times slower than a human. Execution speed could be improved with better state estimation that would allow more travel between MPC steps and fewer MPC replanning cycles. The three primary contributions of this paper are: (1) introducing debridement as a sub-task of interest for surgical robotics, (2) demonstrating the first reliable autonomous robot performance of a surgical sub-task using the Raven, and (3) reporting experiments that highlight the importance of accurate state estimation for future research. Further information including code, photos, and video is available at: http://rll.berkeley.edu/raven.
Ben Kehoe, Gregory Kahn, Jeffrey Mahler, Jonathan Kim, Alex X. Lee, Anna Lee, Keisuke Nakagawa, Sachin Patil, W. Douglas Boyd, Pieter Abbeel, Kenneth Y. Goldberg
ICRA7
1960 Esaki Diode High-Speed Logical Circuits
abstract
Logical circuits using Esaki diodes, and which are based on a principle similar to parametron (subharmonic oscillator element) circuits, are described. Two diodes are used in series to form a basic element called a twin, and a binary digit is represented by the polarity of the potential induced at the middle point of the twin, which is controlled by the majority of input signals applied to the middle point. Unilateral transmission of information in circuits consisting of cascaded twins is achieved by dividing the twins into three groups and by energizing each group one after another in a cyclic manner. Experimental results with the clock frequency as high as 30 mc are reported. Also, a delay-line dynamic memory and a nondestructive memory in matrix form are discussed.
Eiichi Goto, Kenro Murata, Kisaburo Nakazawa, Keisuke Nakagawa, Tohru Moto-Oka, Yasushi Miatsu-Oka, Yoshihiro Ishibashi, Haruhisa Ishida, Takashi Soma, Eiiti Wada
IRE Trans. Electron. Comput.4