Peter Munk

dblp:156/5565 · DBLP profile ↗
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7ranked-venue papers
3as first author
0since 2021 · last 2020
0000-0001-6674-9434ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 3Software engineering, systems software and programming languages · 2 · 1 first-authorSystems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 39% Electronic design automation · 30% Hardware reliability and fault tolerance · 30%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance › reliability modeling
fault tree analysis
0.312018
Semi-automatic safety analysis and optimization · DAC 2018
Electronic design automation › hardware verification and test
hardware verification
0.312018
Semi-automatic safety analysis and optimization · DAC 2018
Embedded and real-time systems › critical systems
safety-critical systems
0.312018
Semi-automatic safety analysis and optimization · DAC 2018
Embedded and real-time systems › automotive embedded systems
automotive e/e architectures
0.112018
Semi-automatic safety analysis and optimization · DAC 2018

Methods — techniques the papers use, named apart from their topics

fault tree analysis · 0.3failure mode and effects analysis · 0.3
YearPublicationVenuePosition
2020 Model-Based Safety Analysis of Mode Transitions
Marco Bozzano, Peter Munk, Markus Schweizer, Stefano Tonetta, Viktória Vozárová
SAFECOMP2
2020 Model-based safety assessment with SysML and component fault trees: application and lessons learned
Peter Munk, Arne Nordmann
Softw. Syst. Model.1
2018 Semi-automatic safety analysis and optimization
abstract
The complexity of safety-critical E/E-systems within the automotive domain are continuously increasing. At the same time, functional safety standards such as the ISO 26262 prescribe analysis methods like the Fault Tree Analysis (FTA) and Failure Mode and Effects Analysis (FMEA). Currently, these analysis methods are mainly performed manually and are often not consistent with an evolving system model.
Peter Munk, Andreas Abele, Eike Thaden, Arne Nordmann, Rakshith Amarnath, Markus Schweizer, Simon Burton 0001
DAC1
2018 Lessons Learned from Model-Based Safety Assessment with SysML and Component Fault Trees
abstract
Mastering the complexity of safety assurance for modern, software-intensive systems is challenging in several domains, such as automotive, robotics, and avionics. Model-based safety analysis techniques show promising results to handle this challenge by automating the generation of required artifacts for an assurance case. In this work, we adapt prominent approaches and propose facilitation of SysML models with component fault trees (CFTs) to support the fault tree analysis (FTA). While most existing approaches based on CFTs are only targeting the system topology, e. g., UML Class Diagrams, we propose an integration of CFTs with SysML Internal Block Diagrams as well as SysML Activity Diagrams. We conclude with best practices and lessons learned that emerged from applying our approach to automotive use-cases.
Arne Nordmann, Peter Munk
MoDELS2
2018 A Model-Based Safety Analysis of Dependencies Across Abstraction Layers
Christoph Dropmann, Eike Thaden, Mario Trapp, Denis Uecker, Rakshith Amarnath, Leandro Avila da Silva, Peter Munk, Markus Schweizer, Matthias Jung 0001, Rasmus Adler
SAFECOMP7
2018 Structuring Validation Targets of a Machine Learning Function Applied to Automated Driving
Lydia Gauerhof, Peter Munk, Simon Burton 0001
SAFECOMP2
2015 Dynamic Guaranteed Service Communication on Best-Effort Networks-on-Chip
abstract
In order to execute applications under real-time constraints on many-core processors with a Network-on-Chip (NoC), guaranteed service (GS) communication with guaranteed end-to-end latency and bandwidth is required. Several hardware-based solutions for GS communication have been proposed in literature. However, commercially available many-core processors, e.g., Tilera's Tile Pro64 or Adapt Eva's Epiphany, do not support such features. In this paper, we propose a software solution that allows GS communication on 2D-mesh packet-switching NoCs. Our investigation is based on a hardware model that is applicable to commercially available processors, which include multiple NoCs to separate request and response packets and support only best-effort communication. We prove that a common upper bound of the injection rate for all sources limits the congestion which leads to an upper bound of the worst-case transmission latency (WCTL) for any transmission, i.e., the combination of a request and a response packet. Furthermore, our approach supports arbitrary transmission streams that can be modified at runtime without violating the upper bound of the WCTL, as long as the injection rate is not violated. This enables adaptive features such as task migration or dynamic scheduling policies. Experiments evaluate our solution for different traffic patterns.
Peter Munk, Matthias Freier, Jan Richling, Jian-Jia Chen
PDP1