Demo Data from VLDB 2026 / reviewers in the wild / expert
Weiran He
dblp:159/9443
· DBLP profile ↗
5ranked-venue papers
0as first author
2since 2021 · last 2025
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 3 · 1 since 2021Systems, architecture and hardware · 2 · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 2Databases, data management, data science and information retrieval · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Cloud and datacenter computing · 77% Storage systems · 23% | |
| Artificial intelligence
1 paper |
Image recognition and object detection · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Cloud and datacenter computing › inference serving
LLM serving |
0.9 | 1 | 2025 | Mooncake: Trading More Storage for Less Computation - A KVCache-centric Architecture for Serving LLM Chatbot · FAST 2025 |
Computer vision › Image recognition and object detection
scene text detection |
0.3 | 1 | 2017 | EAST: An Efficient and Accurate Scene Text Detector · CVPR 2017 |
Storage systems › data management
storage for machine learning |
0.3 | 1 | 2025 | Mooncake: Trading More Storage for Less Computation - A KVCache-centric Architecture for Serving LLM Chatbot · FAST 2025 |
Computer vision › Image recognition and object detection
object detection |
0.1 | 1 | 2017 | EAST: An Efficient and Accurate Scene Text Detector · CVPR 2017 |
Methods — techniques the papers use, named apart from their topics
single-shot detection · 0.3neural network architecture design · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Mooncake: Trading More Storage for Less Computation - A KVCache-centric Architecture for Serving LLM Chatbot
Ruoyu Qin, Zheming Li, Weiran He, Jialei Cui, Feng Ren, Yongwei Wu 0001, Xinran Xu |
FAST | 3 |
| 2025 | MoBA: Mixture of Block Attention for Long-Context LLMsabstractScaling the effective context length is essential for advancing large language models (LLMs) toward artificial general intelligence (AGI). However, the quadratic increase in computational complexity inherent in traditional attention mechanisms presents a prohibitive overhead. Existing approaches either impose strongly biased structures, such as sink or window attention which are task-specific, or radically modify the attention mechanism into linear approximations, whose performance in complex reasoning tasks remains inadequately explored.
In this work, we propose a solution that adheres to the ``less structure'' principle, allowing the model to determine where to attend autonomously, rather than introducing predefined biases. We introduce Mixture of Block Attention (MoBA), an innovative approach that applies the principles of Mixture of Experts (MoE) to the attention mechanism. This novel architecture demonstrates superior performance on long-context tasks while offering a key advantage: the ability to seamlessly transition between full and sparse attention, enhancing efficiency without the risk of compromising performance. MoBA has already been deployed to handle actual production workloads with long-context requirements, demonstrating significant advancements in efficient attention computation for LLMs. Our code is available at https://github.com/MoonshotAI/MoBA. Enzhe Lu, Zhejun Jiang, Yulun Du, Chao Hong, Weiran He, Enming Yuan, Yuzhi Wang, Huan Yuan, Suting Xu, Xinran Xu, Guokun Lai, Huabin Zheng, Jianlin Su, Yuxin Wu 0006, Jiezhong Qiu |
NeurIPS | 8 |
| 2017 | GeneGAN: Learning Object Transfiguration and Object Subspace from Unpaired Data
Shuchang Zhou 0001, Taihong Xiao, Yi Yang 0033, Dieqiao Feng, Qinyao He, Weiran He |
BMVC | 6 |
| 2017 | EAST: An Efficient and Accurate Scene Text DetectorabstractPrevious approaches for scene text detection have already achieved promising performances across various benchmarks. However, they usually fall short when dealing with challenging scenarios, even when equipped with deep neural network models, because the overall performance is determined by the interplay of multiple stages and components in the pipelines. In this work, we propose a simple yet powerful pipeline that yields fast and accurate text detection in natural scenes. The pipeline directly predicts words or text lines of arbitrary orientations and quadrilateral shapes in full images, eliminating unnecessary intermediate steps (e.g., candidate aggregation and word partitioning), with a single neural network. The simplicity of our pipeline allows concentrating efforts on designing loss functions and neural network architecture. Experiments on standard datasets including ICDAR 2015, COCO-Text and MSRA-TD500 demonstrate that the proposed algorithm significantly outperforms state-of-the-art methods in terms of both accuracy and efficiency. On the ICDAR 2015 dataset, the proposed algorithm achieves an F-score of 0.7820 at 13.2fps at 720p resolution. Xinyu Zhou 0004, Cong Yao, Yuzhi Wang, Shuchang Zhou 0001, Weiran He, Jiajun Liang |
CVPR | 6 |
| 2015 | SVM-Based Routability-Driven Chip-Level Design for Voltage-Aware Pin-Constrained EWOD ChipsabstractThe chip-level design problem is critical in pin-constrained electrowetting-on-dielectric (EWOD) biochips, which not only affects the number of control pins and PCB routing layers from the manufacturing cost point of view, but also determines the functional reliability induced by excessive applied voltage. Existing works either greedily minimize the number of control pins with degraded routability, or disregard the differences in driving voltages on the electrodes, where the trapped charge due to excessive applied voltage causes significant reliability issue. This paper presents the first SVM-based classifier for electrode addressing in chip-level design stage, which simultaneously optimizes the number of control pins, routability, as well as reliability. Experimental results on both real-life chips and synthesized benchmarks show that, compared with the state-of-the-art method, the SVM-based electrode addressing method obtains significant improvements in both routability and reliability. Qin Wang 0005, Weiran He, Hailong Yao 0002, Tsung-Yi Ho, Yici Cai |
ISPD | 2 |