VLDB 2026 Research / reviewers in the wild / expert
Thomas W. Lake
dblp:16/1639 · also Tom Lake
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2000
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Program analysis · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Embedded and real-time systems · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Program analysis › security analysis
noninterference analysis |
0.0 | 1 | 2000 | Non-Interference Analysis for Mixed Criticality Code in Avionics Systems · ASE 2000 |
Program analysis
static analysis |
0.0 | 1 | 2000 | Non-Interference Analysis for Mixed Criticality Code in Avionics Systems · ASE 2000 |
Embedded and real-time systems › real-time scheduling › mixed-criticality scheduling
mixed-criticality systems |
0.0 | 1 | 2000 | Non-Interference Analysis for Mixed Criticality Code in Avionics Systems · ASE 2000 |
Embedded and real-time systems › real-time embedded systems
avionics systems |
0.0 | 1 | 2000 | Non-Interference Analysis for Mixed Criticality Code in Avionics Systems · ASE 2000 |
Methods — techniques the papers use, named apart from their topics
static analysis · 0.1dynamic analysis · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2000 | Non-Interference Analysis for Mixed Criticality Code in Avionics SystemsabstractFuture aircraft system procurements are expected to utilise a new form of modular architecture. However, the architectures being put forward only provide for hardware partitioning, and there is little protection for safety-critical processes from interference by rogue processes. This paper puts forward a mixed static/dynamic analysis approach for assuring software partitioning of processes within a single hardware partition. Such an approach is a necessity in cost effective modular architectures if all processes are not to be classified and developed as safety-critical. Mike G. Hill, Thomas W. Lake |
ASE | 2 |
| 1995 | Featherweight Threads and ANDF Compilation of Concurrency
Ben Sloman, Thomas W. Lake |
Euro-Par | 2 |