Demo Data from VLDB 2026 / reviewers in the wild / expert
Elliott I. Organick
dblp:16/2237
· DBLP profile ↗
5ranked-venue papers
2as first author
0since 2021 · last 1985
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 3Systems, architecture and hardware · 2 · 1 first-authorHuman-computer interaction and ubiquitous computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 70% Parallel and multicore computing · 30% | |
| Software engineering, system software, and programming languages
2 papers |
Operating systems · 70% Concurrent programming · 30% |
Topics — the 8 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › instruction set architecture
high-level language architecture |
0.0 | 1 | 1982 | µ3L: An HLL-RISC processor for parallel execution of FP-language programs · ISCA 1982 |
Processor architecture and microarchitecture
instruction set architecture |
0.0 | 1 | 1982 | µ3L: An HLL-RISC processor for parallel execution of FP-language programs · ISCA 1982 |
Parallel and multicore computing
parallel programming models |
0.0 | 1 | 1982 | µ3L: An HLL-RISC processor for parallel execution of FP-language programs · ISCA 1982 |
Processor architecture and microarchitecture › instruction set architecture
RISC |
0.0 | 1 | 1982 | µ3L: An HLL-RISC processor for parallel execution of FP-language programs · ISCA 1982 |
Parallel and multicore computing
multiprocessor system |
0.0 | 1 | 1982 | µ3L: An HLL-RISC processor for parallel execution of FP-language programs · ISCA 1982 |
Operating systems › i/o
i/o subsystem |
0.0 | 1 | 1971 | The MULTICS Input/Output System · SOSP 1971 |
Operating systems
interprocess communication |
0.0 | 1 | 1969 | The multics interprocess communication facility · SOSP 1969 |
Concurrent programming
message passing |
0.0 | 1 | 1969 | The multics interprocess communication facility · SOSP 1969 |
Methods — techniques the papers use, named apart from their topics
traffic controller · 0.0system-wide conventions · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1985 | Algorithms, concurrent processors, and computer science education: or, "think concurrently or capitulate?"abstractConcurrent processor supercomputers are yet another emerging reality to be reckoned with in preparing appropriate curricula for the remainder of the 1980s and beyond.Old problems need to be revisited and re-formulated for solution on concurrent computing systems.Such systems will soon be marketed.Fortunately for us, learning to exploit and teach the use of concurrent computer systems is exciting and rewarding work.At least one new book presenting concurrent algorithms for well known problems, aimed at graduate students and faculty, will be appearing shortly; it and similar books are likely to trigger a new wave of text and course development tailored for undergraduates.The conclusion is inescapable that concurrent computer systems and their use are another essential and attractive facet of the computer phenomenon, and another intellectual challenge set before us all.Fortunately, "thinking concurrently" is fun! Elliott I. Organick |
SIGCSE | 1 |
| 1982 | µ3L: An HLL-RISC processor for parallel execution of FP-language programsabstractTo eliminate the conceptual distance between the hardware instruction set and the user interface, some architects advocate High Level Language (HLL) machines. To obtain simple, fast and cheap machines, some architects advocate Reduced Instruction Set Computer (RISC) machines. This paper reconciles both views and presents an architecture which has both an HLL user interface and a RISC hardware. Each instance of this architecture is a module of an HLL multiprocessor system. Functional programming languages offer a bridge between mathematical models of computation and multiprocessor system environments. We choose the language AFPL (A Functional Programming Language) as the HLL user interface. AFPL's direct execution model, based on a tree structured internal representation, takes advantage of the parallelism inherent in programs by decomposing them on the fly into tasks which can be performed concurrently. M. Castan, Elliott I. Organick |
ISCA | 2 |
| 1979 | New directions in computer systems architecture
Elliott I. Organick |
Euromicro Newsletter | 1 |
| 1971 | The MULTICS Input/Output SystemabstractAn I/0 system has been implemented in the Multics system that facilitates dynamic switching of I/0 devices. This switching is accomplished by providing a general interface for all I/O devices that allows all equivalent operations on different devices to be expressed in the same way. Also particular devices are referenced by symbolic names and the binding of names to devices can be dynamically modified. Available I/0 operations range from a set of basic I/0 calls that require almost no knowledge of the I/O System or the I/0 device being used to fully general calls that permit one to take full advantage of all features of an I/O device but require considerable knowledge of the I/0 System and the device. The I/O System is described and some popular applications of it, illustrating these features, are presented. Richard J. Feiertag, Elliott I. Organick |
SOSP | 2 |
| 1969 | The multics interprocess communication facilityabstractEssential to any multi-process computer system is some mechanism to enable coexisting processes to communicate with one another. The basic inter-process communication (IPC) mechanism is the exchange of messages among independent processes in a commonly accessible data base and in accordance with some pre-arranged convention.By introducing several system wide conventions for initiating communication, and by utilizing the Traffic Controller it is possible to expand the basic IPC mechanism into a general purpose IPC facility. The Multics IPC facility is an extension of the central supervisor which assumes the burden of managing the shared data base and of respecting the IPC conventions, thus providing a simple and easy way for the programmer to use the interface. Michael J. Spier, Elliott I. Organick |
SOSP | 2 |