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Jialiang Yu

dblp:16/2674 · DBLP profile ↗
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5ranked-venue papers
0as first author
3since 2021 · last 2026
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Databases, data management, data science and information retrieval · 3 · 1 since 2021Artificial intelligence and machine learning · 2 · 2 since 2021Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Hardware reliability and fault tolerance · 65% Distributed systems · 23% Performance modeling and evaluation · 7%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance › memory reliability
DRAM failure prediction
1.012026
Predicting DRAM Failures at Scale: A Two-Stage Approach for Heterogeneous Systems · HPCA 2026
Hardware reliability and fault tolerance › memory reliability
DRAM reliability
1.012026
Predicting DRAM Failures at Scale: A Two-Stage Approach for Heterogeneous Systems · HPCA 2026
Distributed systems › fault tolerance › proactive fault tolerance
failure prediction
1.012026
Predicting DRAM Failures at Scale: A Two-Stage Approach for Heterogeneous Systems · HPCA 2026
Hardware reliability and fault tolerance › memory reliability
memory failure prediction
0.912025
M2-MFP: A Multi-Scale and Multi-Level Memory Failure Prediction Framework for Reliable Cloud Infrastructure · KDD (2) 2025
Performance modeling and evaluation
workload characterization
0.312026
Predicting DRAM Failures at Scale: A Two-Stage Approach for Heterogeneous Systems · HPCA 2026
Cloud and datacenter computing › cloud infrastructure
cloud infrastructure reliability
0.312025
M2-MFP: A Multi-Scale and Multi-Level Memory Failure Prediction Framework for Reliable Cloud Infrastructure · KDD (2) 2025

Methods — techniques the papers use, named apart from their topics

two-stage training · 1.0feature engineering · 1.0catboost · 1.0adaptive reweighting · 1.0temporal modeling · 0.9rule-generation trees · 0.9binary spatial feature extraction · 0.9
YearPublicationVenuePosition
2026 Predicting DRAM Failures at Scale: A Two-Stage Approach for Heterogeneous Systems
abstract
Memory failures in large-scale production environments pose critical threats to system reliability and service availability. While existing studies have conducted in-depth analyses of the temporal and spatial correlations of memory errors, differences in characteristics across architectures remain largely unexplored. To uncover these overlooked correlations, this paper conducts an extensive analysis of over 130,000 DDR4 DIMMs collected from large-scale heterogeneous production clusters over a nine-month period. Through systematic spatial and temporal analysis across two Intel x86 architectures and four major DRAM vendors, we uncover five new findings and propose a novel twostage training strategy. This strategy addresses sample quality issues by applying temporal weighting to positive samples and adaptive reweighting to negative samples. It also incorporates comprehensive multi-dimensional feature engineering, covering static, spatial, temporal, and micro-level characteristics. Finally, it integrates dual-driven sampling strategies and adaptive prediction timing to balance prediction accuracy and operational efficiency. Extensive evaluation shows that our CatBoost-based model achieves F1-scores of 49.9% on Intel x86v5 and 57.6% on Intel x86v6, substantially outperforming existing methods. This cross-architecture validation demonstrates the robustness and generalization of our approach across different hardware platforms. To the best of our knowledge, our work presents the first large-scale cross-architecture analysis of memory error patterns and provides new insights for production-scale memory failure prediction systems.
Shouxin Wang, Zhirong Shen, Shuyue Zhou, Ronglong Wu, Min Zhou 0006, Jialiang Yu
HPCA8
2025 M2-MFP: A Multi-Scale and Multi-Level Memory Failure Prediction Framework for Reliable Cloud Infrastructure
abstract
As cloud services become increasingly integral to modern IT infrastructure, ensuring hardware reliability is essential to sustain high-quality service. Memory failures pose a significant threat to overall system stability, making accurate failure prediction through the analysis of memory error logs (i.e., Correctable Errors) imperative. Existing memory failure prediction approaches have notable limitations: rule-based expert models suffer from limited generalizability and low recall rates, while automated feature extraction methods exhibit suboptimal performance. To address these limitations, we propose M2-MFP: a Multi-scale and Multi-Level Memory Failure Prediction framework designed to enhance the reliability and availability of cloud infrastructure. M2-MFP converts correctable errors (CEs) into multi-level binary matrix representations and introduces a Binary Spatial Feature Extractor (BSFE) to automatically extract high-order features at both DIMM-level and bit-level. Building upon the BSFE outputs, we develop a dual-path temporal modeling architecture: 1) a time-patch module that aggregates multi-level features within observation windows, and 2) a time-point module that employs interpretable rule-generation trees trained on bit-level patterns. Experiments on both benchmark datasets and real-world deployment show the superiority of M2-MFP as it outperforms existing state-of-the-art methods by significant margins. Code and data are available at this repository: https://github.com/hwcloud-RAS/M2-MFP.
Hongyi Xie, Min Zhou 0006, Qiao Yu 0003, Jialiang Yu, Zhenli Sheng, Hong Xie 0004, Defu Lian
KDD (2)4
2023 Bayesian Co-evolutionary Optimization based entropy search for high-dimensional many-objective optimization
Hongli Bian, Jie Tian 0004, Jialiang Yu, Han Yu 0001
Knowl. Based Syst.3
2015 Probabilistic Frequent Pattern Mining by PUH-Mine
Wenzhu Tong, Carson K. Leung, Dacheng Liu, Jialiang Yu
APWeb4
2008 Efficient algorithms for stream mining of constrained frequent patterns in a limited memory environment
abstract
As technology advances, streams of data can be rapidly generated in many real-life applications. This calls for stream mining, which searches for implicit, previously unknown, and potentially useful information---such as frequent patterns---that might be embedded in continuous data streams. However, most of the existing algorithms do not allow users to express the patterns to be mined according to their intentions, via the use of constraints. As a result, these unconstrained mining algorithms can yield numerous patterns that are not interesting to the users. Moreover, many existing tree-based algorithms assume that all the trees constructed during the mining process can fit into memory. While this assumption holds for many situations, there are many other situations in which it does not hold. Hence, in this paper, we develop efficient algorithms for stream mining of constrained frequent patterns in a limited memory environment. Our algorithms allow users to impose a certain focus on the mining process, discover from data streams all those frequent patterns that satisfy the user constraints, and handle situations where the available memory space is limited.
Carson K. Leung, Dale A. Brajczuk, Jialiang Yu
IDEAS3