Scott Devine

dblp:16/3914 · DBLP profile ↗
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6ranked-venue papers
0as first author
0since 2021 · last 2012
0000-0003-2691-0507ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4Software engineering, systems software and programming languages · 4

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
5 papers
Processor architecture and microarchitecture · 46% Cloud and datacenter computing · 42% Memory systems · 12%
Software engineering, system software, and programming languages
5 papers
Operating systems · 100%

Topics — the 19 heaviest of 20, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cloud and datacenter computing
virtualization
0.232012
Bringing Virtualization to the x86 Architecture with the Original VMware Workstation · ACM Trans. Comput. Syst. 2012
Disco: Running Commodity Operating Systems on Scalable Multiprocessors · ACM Trans. Comput. Syst. 1997
DISCO: Running Commodity Operating Systems on Scalable Multiprocessors · SOSP 1997
Processor architecture and microarchitecture › binary translation
dynamic binary translation
0.112012
Bringing Virtualization to the x86 Architecture with the Original VMware Workstation · ACM Trans. Comput. Syst. 2012
Processor architecture and microarchitecture
instruction set architecture
0.012012
Bringing Virtualization to the x86 Architecture with the Original VMware Workstation · ACM Trans. Comput. Syst. 2012
Processor architecture and microarchitecture › instruction set architecture › CISC
x86
0.012012
Bringing Virtualization to the x86 Architecture with the Original VMware Workstation · ACM Trans. Comput. Syst. 2012
Cloud and datacenter computing › virtualization
virtual machine monitor
0.021997
Disco: Running Commodity Operating Systems on Scalable Multiprocessors · ACM Trans. Comput. Syst. 1997
DISCO: Running Commodity Operating Systems on Scalable Multiprocessors · SOSP 1997
Operating systems › multiprocessing
multiprocessor operating system
0.021997
Disco: Running Commodity Operating Systems on Scalable Multiprocessors · ACM Trans. Comput. Syst. 1997
Hive: Fault Containment for Shared-Memory Multiprocessors · SOSP 1995
Operating systems
commodity operating systems
0.011997
DISCO: Running Commodity Operating Systems on Scalable Multiprocessors · SOSP 1997
Operating systems › resource management
memory management
0.011996
Operating System Support for Improving Data Locality on CC-NUMA Compute Servers · ASPLOS 1996
Memory systems › non-uniform memory access
CC-NUMA
0.011996
Operating System Support for Improving Data Locality on CC-NUMA Compute Servers · ASPLOS 1996
Memory systems
data locality
0.011996
Operating System Support for Improving Data Locality on CC-NUMA Compute Servers · ASPLOS 1996
Operating systems › kernel
kernel design
0.011995
Hive: Fault Containment for Shared-Memory Multiprocessors · SOSP 1995
Operating systems › resource management › process management
CPU scheduling
0.011994
Scheduling and Page Migration for Multiprocessor Compute Servers · ASPLOS 1994
Operating systems › resource management › process management › CPU scheduling
multiprocessor scheduling
0.011994
Scheduling and Page Migration for Multiprocessor Compute Servers · ASPLOS 1994
Memory systems › virtual memory management
page migration
0.011994
Scheduling and Page Migration for Multiprocessor Compute Servers · ASPLOS 1994
Memory systems
non-uniform memory access
0.011997
Disco: Running Commodity Operating Systems on Scalable Multiprocessors · ACM Trans. Comput. Syst. 1997
Memory systems
shared memory
0.011997
Disco: Running Commodity Operating Systems on Scalable Multiprocessors · ACM Trans. Comput. Syst. 1997
Memory systems
cache coherence
0.011996
Operating System Support for Improving Data Locality on CC-NUMA Compute Servers · ASPLOS 1996
Processor architecture and microarchitecture › multiprocessor architecture
cache-coherent multiprocessor
0.011994
Scheduling and Page Migration for Multiprocessor Compute Servers · ASPLOS 1994
Memory systems › shared memory
distributed shared memory
0.011994
Scheduling and Page Migration for Multiprocessor Compute Servers · ASPLOS 1994

Methods — techniques the papers use, named apart from their topics

trap-and-emulate · 0.1partial evaluation · 0.1dynamic binary translation · 0.1adaptive retranslation · 0.1virtual machine monitor · 0.0distributed-system support · 0.0trace-driven simulation · 0.0cache miss sampling · 0.0cluster affinity · 0.0cache affinity · 0.0kernel partitioning · 0.0time-slicing · 0.0space-sharing · 0.0
YearPublicationVenuePosition
2012 Bringing Virtualization to the x86 Architecture with the Original VMware Workstation
abstract
This article describes the historical context, technical challenges, and main implementation techniques used by VMware Workstation to bring virtualization to the x86 architecture in 1999. Although virtual machine monitors (VMMs) had been around for decades, they were traditionally designed as part of monolithic, single-vendor architectures with explicit support for virtualization. In contrast, the x86 architecture lacked virtualization support, and the industry around it had disaggregated into an ecosystem, with different vendors controlling the computers, CPUs, peripherals, operating systems, and applications, none of them asking for virtualization. We chose to build our solution independently of these vendors. As a result, VMware Workstation had to deal with new challenges associated with (i) the lack of virtualization support in the x86 architecture, (ii) the daunting complexity of the architecture itself, (iii) the need to support a broad combination of peripherals, and (iv) the need to offer a simple user experience within existing environments. These new challenges led us to a novel combination of well-known virtualization techniques, techniques from other domains, and new techniques. VMware Workstation combined a hosted architecture with a VMM. The hosted architecture enabled a simple user experience and offered broad hardware compatibility. Rather than exposing I/O diversity to the virtual machines, VMware Workstation also relied on software emulation of I/O devices. The VMM combined a trap-and-emulate direct execution engine with a system-level dynamic binary translator to efficiently virtualize the x86 architecture and support most commodity operating systems. By relying on x86 hardware segmentation as a protection mechanism, the binary translator could execute translated code at near hardware speeds. The binary translator also relied on partial evaluation and adaptive retranslation to reduce the overall overheads of virtualization. Written with the benefit of hindsight, this article shares the key lessons we learned from building the original system and from its later evolution.
Edouard Bugnion, Scott Devine, Mendel Rosenblum, Jeremy Sugerman, Edward Y. Wang
ACM Trans. Comput. Syst.2
1997 DISCO: Running Commodity Operating Systems on Scalable Multiprocessors
abstract
Article Free Access Share on Disco: running commodity operating systems on scalable multiprocessors Authors: Edouard Bugnion Computer Systems Laboratory, Stanford University, Stanford, CA Computer Systems Laboratory, Stanford University, Stanford, CAView Profile , Scott Devine Computer Systems Laboratory, Stanford University, Stanford, CA Computer Systems Laboratory, Stanford University, Stanford, CAView Profile , Mendel Rosenblum Computer Systems Laboratory, Stanford University, Stanford, CA Computer Systems Laboratory, Stanford University, Stanford, CAView Profile Authors Info & Claims SOSP '97: Proceedings of the sixteenth ACM symposium on Operating systems principlesOctober 1997 Pages 143–156https://doi.org/10.1145/268998.266672Published:01 October 1997Publication History 160citation2,506DownloadsMetricsTotal Citations160Total Downloads2,506Last 12 Months105Last 6 weeks6 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF
Edouard Bugnion, Scott Devine, Mendel Rosenblum
SOSP2
1997 Disco: Running Commodity Operating Systems on Scalable Multiprocessors
abstract
In this article we examine the problem of extending modern operating systems to run efficiently on large-scale shared-memory multiprocessors without a large implementation effort. Our approach brings back an idea popular in the 1970s: virtual machine monitors. We use virtual machines to run multiple commodity operating systems on a scalable multiprocessor. This solution addresses many of the challenges facing the system software for these machines. We demonstrate our approach with a prototype called Disco that runs multiple copies of Silicon Graphics' IRIX operating system on a multiprocessor. Our experience shows that the overheads of the monitor are small and that the approach provides scalability as well as the ability to deal with the nonuniform memory access time of these systems. To reduce the memory overheads associated with running multiple operating systems, virtual machines transparently share major data structures such as the program code and the file system buffer cache. We use the distributed-system support of modern operating systems to export a partial single system image to the users. The overall solution achieves most of the benefits of operating systems customized for scalable multiprocessors, yet it can be achieved with a significantly smaller implementation effort.
Edouard Bugnion, Scott Devine, Kinshuk Govil, Mendel Rosenblum
ACM Trans. Comput. Syst.2
1996 Operating System Support for Improving Data Locality on CC-NUMA Compute Servers
abstract
The dominant architecture for the next generation of shared-memory multiprocessors is CC-NUMA (cache-coherent non-uniform memory architecture). These machines are attractive as compute servers because they provide transparent access to local and remote memory. However, the access latency to remote memory is 3 to 5 times the latency to local memory. CC-NOW machines provide the benefits of cache coherence to networks of workstations, at the cost of even higher remote access latency. Given the large remote access latencies of these architectures, data locality is potentially the most important performance issue. Using realistic workloads, we study the performance improvements provided by OS supported dynamic page migration and replication. Analyzing our kernel-based implementation, we provide a detailed breakdown of the costs. We show that sampling of cache misses can be used to reduce cost without compromising performance, and that TLB misses may not be a consistent approximation for cache misses. Finally, our experiments show that dynamic page migration and replication can substantially increase application performance, as much as 30%, and reduce contention for resources in the NUMA memory system.
Ben Verghese, Scott Devine, Anoop Gupta, Mendel Rosenblum
ASPLOS2
1995 Hive: Fault Containment for Shared-Memory Multiprocessors
abstract
Reliabilityand scalability are major concerns when designing operating systems for large-scale shared-memory multiprocessors.In this paper we describe Hive, an operating system with a novel kernel architecture that addresses these issues Hive is structured as an internal distributed system of independent kernels called cells.This improves reliabihty because a hardwme or software fault damages only one cell rather than the whole system, and improves scalability because few kernel resources are shared by processes running on different cells.The Hive prototype is a complete implementation of UNIX SVR4 and is targeted to run on the Stanford FLASH multiprocessor.This paper focuses on Hive's solutlon to the following key challenges: ( 1) fault containment, i.e. confining the effects of hardware or software faults to the cell where they occur, and (2) memory sharing among cells, which is requmed to achieve
John Chapin, Mendel Rosenblum, Scott Devine, Tirthankar Lahiri, Dan Teodosiu 0002, Anoop Gupta
SOSP3
1994 Scheduling and Page Migration for Multiprocessor Compute Servers
abstract
Several cache-coherent shared-memory multiprocessors have been developed that are scalable and offer a very tight coupling between the processing resources. They are therefore quite attractive for use as compute servers for multiprogramming and parallel application workloads. Process scheduling and memory management, however, remain challenging due to the distributed main memory found on such machines. This paper examines the effects of OS scheduling and page migration policies on the performance of such compute servers. Our experiments are done on the Stanford DASH, a distributed-memory cache-coherent multiprocessor. We show that for our multiprogramming workloads consisting of sequential jobs, the traditional Unix scheduling policy does very poorly. In contrast, a policy incorporating cluster and cache affinity along with a simple page-migration algorithm offers up to two-fold performance improvement. For our workloads consisting of multiple parallel applications, we compare space-sharing policies that divide the processors among the applications to time-slicing policies such as standard Unix or gang scheduling. We show that space-sharing policies can achieve better processor utilization due to the operating point effect, but time-slicing policies benefit strongly from user-level data distribution. Our initial experience with automatic page migration suggests that policies based only on TLB miss information can be quite effective, and useful for addressing the data distribution problems of space-sharing schedulers.
Rohit Chandra, Scott Devine, Ben Verghese, Anoop Gupta, Mendel Rosenblum
ASPLOS2