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R. W. Marczynski

dblp:16/5655 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1983
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 87% Parallel and multicore computing · 13%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
dataflow architecture		 0.011983
A Data Driven System Based on a Microprogrammed Processor Module · ISCA 1983
Processor architecture and microarchitecture › microprogramming
microprogrammable processor		 0.011983
A Data Driven System Based on a Microprogrammed Processor Module · ISCA 1983

Methods — techniques the papers use, named apart from their topics

microprogramming · 0.0data flow graph · 0.0
YearPublicationVenuePosition
1983 A Data Driven System Based on a Microprogrammed Processor Module
abstract
A hardware approach to the design of data driven computers using a microprogrammed processor as a building block is proposed. The data driven computer is a network of processors virtually implementing the data flow program graph. The flexibility of microprogramming provides a wide variety of possible implementations for the fixed data driven network structure. Due to the proposed organization of communication the network is deadlock-free.
R. W. Marczynski, J. Milewski
 ISCA1