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Khalid Ahmad

dblp:160/2165 · DBLP profile ↗
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3ranked-venue papers
2as first author
2since 2021 · last 2025
0000-0002-5966-5774ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-author · 2 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
High-performance computing · 55% GPUs and heterogeneous computing · 24% Hardware accelerators and domain-specific architectures · 12%

Topics — the 12 heaviest of 13, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing
sparse linear algebra
1.222024
Exploring Data Layout for Sparse Tensor Times Dense Matrix on GPUs · ACM Trans. Archit. Code Optim. 2024
Data-driven Mixed Precision Sparse Matrix Vector Multiplication for GPUs · ACM Trans. Archit. Code Optim. 2020
GPUs and heterogeneous computing
GPU computing
0.912025
Sparsified Preconditioned Conjugate Gradient Solver on GPUs · SC 2025
High-performance computing › iterative methods
preconditioned conjugate gradient
0.912025
Sparsified Preconditioned Conjugate Gradient Solver on GPUs · SC 2025
High-performance computing
scientific computing systems
0.912025
Sparsified Preconditioned Conjugate Gradient Solver on GPUs · SC 2025
High-performance computing
sparse linear solver
0.912025
Sparsified Preconditioned Conjugate Gradient Solver on GPUs · SC 2025
GPUs and heterogeneous computing › GPU kernel
sparse-dense matrix multiplication
0.812024
Exploring Data Layout for Sparse Tensor Times Dense Matrix on GPUs · ACM Trans. Archit. Code Optim. 2024
Hardware accelerators and domain-specific architectures › sparsity exploitation
sparse tensor computation
0.812024
Exploring Data Layout for Sparse Tensor Times Dense Matrix on GPUs · ACM Trans. Archit. Code Optim. 2024
Processor architecture and microarchitecture › computer arithmetic › floating-point arithmetic
mixed-precision arithmetic
0.412020
Data-driven Mixed Precision Sparse Matrix Vector Multiplication for GPUs · ACM Trans. Archit. Code Optim. 2020
High-performance computing › sparse linear algebra › sparse matrix computation
sparse matrix-vector multiplication
0.412020
Data-driven Mixed Precision Sparse Matrix Vector Multiplication for GPUs · ACM Trans. Archit. Code Optim. 2020
Hardware accelerators and domain-specific architectures
decision tree classifier
0.212024
Exploring Data Layout for Sparse Tensor Times Dense Matrix on GPUs · ACM Trans. Archit. Code Optim. 2024
GPUs and heterogeneous computing
kernel selection
0.212024
Exploring Data Layout for Sparse Tensor Times Dense Matrix on GPUs · ACM Trans. Archit. Code Optim. 2024
High-performance computing
performance optimization
0.112020
Data-driven Mixed Precision Sparse Matrix Vector Multiplication for GPUs · ACM Trans. Archit. Code Optim. 2020

Methods — techniques the papers use, named apart from their topics

sparsification · 0.9ILU preconditioning · 0.9hierarchical tensor layout · 0.8decision tree classifier · 0.8mixed precision · 0.4
YearPublicationVenuePosition
2025 Sparsified Preconditioned Conjugate Gradient Solver on GPUs
abstract
Preconditioned iterative sparse linear solvers are memory-efficient for large scientific simulations, but the dependences between iterations introduced by preconditioners limit parallelization. This issue is exacerbated on GPUs, which feature many parallel cores. We propose a sparsified preconditioned conjugate gradient (SPCG) solver that increases parallelism by reducing dependences through sparsification, while preserving convergence behavior. We evaluate the proposed SPCG using both ILU(0) and ILU(K) preconditioners on a wide range of symmetric positive definite (SPD) matrices. The proposed SPCG improves the performance of the iterative phase of SPCG by a geometric mean speedup of 1.23 × and 1.65 × over the non-sparsified PCG using ILU(0) and ILU(K), respectively on an NVIDIA A100 GPU. SPCG also yields geometric mean end-to-end speedups of 1.68 × and 3.73 × over the non-sparsified versions with ILU(0) and ILU(K), respectively, on the same platform.
Khalid Ahmad, Kazem Cheshmi, Hari Sundar, Mary W. Hall
SC2
2024 Exploring Data Layout for Sparse Tensor Times Dense Matrix on GPUs
abstract
An important sparse tensor computation is sparse-tensor-dense-matrix multiplication (SpTM), which is used in tensor decomposition and applications. SpTM is a multi-dimensional analog to sparse-matrix-dense-matrix multiplication (SpMM). In this article, we employ a hierarchical tensor data layout that can unfold a multidimensional tensor to derive a 2D matrix, making it possible to compute SpTM using SpMM kernel implementations for GPUs. We compare two SpMM implementations to the state-of-the-art PASTA sparse tensor contraction implementation using: (1) SpMM with hierarchical tensor data layout; and, (2) unfolding followed by an invocation of cuSPARSE’s SpMM. Results show that SpMM can outperform PASTA 70.9% of the time, but none of the three approaches is best overall. Therefore, we use a decision tree classifier to identify the best performing sparse tensor contraction kernel based on precomputed properties of the sparse tensor.
Khalid Ahmad, Cris Cecka, Michael Garland, Mary W. Hall
ACM Trans. Archit. Code Optim.1
2020 Data-driven Mixed Precision Sparse Matrix Vector Multiplication for GPUs
abstract
We optimize Sparse Matrix Vector multiplication (SpMV) using a mixed precision strategy (MpSpMV) for Nvidia V100 GPUs. The approach has three benefits: (1) It reduces computation time, (2) it reduces the size of the input matrix and therefore reduces data movement, and (3) it provides an opportunity for increased parallelism. MpSpMV’s decision to lower to single precision is data driven , based on individual nonzero values of the sparse matrix. On all real-valued matrices from the Sparse Matrix Collection, we obtain a maximum speedup of 2.61× and average speedup of 1.06× over double precision, while maintaining higher accuracy compared to single precision.
Khalid Ahmad, Hari Sundar, Mary W. Hall
ACM Trans. Archit. Code Optim.1