VLDB 2026 Research / reviewers in the wild / expert
Faustin Ahishakiye
dblp:160/4894
· DBLP profile ↗
3ranked-venue papers
3as first author
1since 2021 · last 2021
0000-0003-1571-0964ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 2 · 2 first-authorTheory of computation · 2 · 2 first-author · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | MC/DC Test Cases Generation Based on BDDs
Faustin Ahishakiye, José Ignacio Requeno, Lars Michael Kristensen, Volker Stolz |
SETTA | 1 |
| 2020 | Coverage Analysis of Net Inscriptions in Coloured Petri Net Models
Faustin Ahishakiye, José Ignacio Requeno, Lars Michael Kristensen, Volker Stolz |
VECoS | 1 |
| 2019 | Non-Intrusive MC/DC Measurement Based on TracesabstractWe present a novel, non-intrusive approach to MC/DC coverage measurement using modern processor-based tracing facilities. Our approach does not require recompilation or instrumentation of the software under test. Instead, we use the Intel Processor Trace (Intel PT) facility present on modern Intel CPUs. Our tooling consists of the following parts: a frontend that detects so-called decisions (Boolean expressions) that are used in conditionals in C source code, a mapping from conditional jumps in the object code back to those decisions, and an analysis that computes satisfaction of the MC/DC coverage relation on those decisions from an execution trace. This analysis takes as input a stream of instruction addresses decoded from Intel PT trace data, which was recorded while running the software under test. We describe our architecture and discuss limitations and future work. Faustin Ahishakiye, Svetlana Jaksic, Felix D. Lange, Malte Schmitz 0001, Volker Stolz, Daniel Thoma |
TASE | 1 |