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Fuqi Luo

dblp:161/5160 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2015
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 91% Interconnection networks and networks-on-chip · 9%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › physical design › routing › multilayer routing
layer assignment
0.212015
Delay-Driven and Antenna-Aware Layer Assignment in Global Routing Under Multitier Interconnect Structure · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015
Electronic design automation
physical design
0.212015
Delay-Driven and Antenna-Aware Layer Assignment in Global Routing Under Multitier Interconnect Structure · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015
Electronic design automation › physical design
routing
0.212015
Delay-Driven and Antenna-Aware Layer Assignment in Global Routing Under Multitier Interconnect Structure · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015
Interconnection networks and networks-on-chip
interconnect delay
0.112015
Delay-Driven and Antenna-Aware Layer Assignment in Global Routing Under Multitier Interconnect Structure · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015

Methods — techniques the papers use, named apart from their topics

negotiation technique · 0.2dynamic programming · 0.2
YearPublicationVenuePosition
2015 Delay-Driven and Antenna-Aware Layer Assignment in Global Routing Under Multitier Interconnect Structure
abstract
A multilayer routing system usually adopts multiple interconnect configuration with different wire sizes and thicknesses. Since thicker layers of metal lead to fatter wires with smaller resistance, the layer assignment (LA) of nets has a large impact on the interconnect delay. However, such layer-dependent characteristics have been ignored by most of the state-of-the-art academic LA methods. These characteristics also weaken the previous wire length-based antenna avoidance method, because the net length itself cannot accurately capture the antenna area under the condition of various wire sizes. To remedy this deficiency, this paper proposes a more effective three-stage LA algorithm under multitier interconnect structure, and focuses on minimizing delays, via count, and antenna violations. It first minimizes the total delay and via count simultaneously by dynamic programming and negotiation technique, and then further minimizes the maximum delay carefully while almost unchanging the via count. After that, a check-and-repair method is adopted to further fix the antenna violations. The experimental results on the International Conference on Computer-Aided Design'09 benchmarks show that the proposed algorithm can significantly reduce the total delay and maximum delay while still keeping roughly the same via count compared with the state-of-the-art via count minimization LA method negotiation-based via minimization algorithm. At the same time, the antenna violation repair method can dramatically reduce the antenna violated nets and sinks with little impact on the solution quality.
Sheqin Dong, Jianchang Ao, Fuqi Luo
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3