Muhammad Osama 0003

dblp:161/8106-3 · also Muhammad Osama Mahmoud 0003 · DBLP profile ↗
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15ranked-venue papers
9as first author
9since 2021 · last 2026
0000-0002-5023-5348ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 10 · 6 first-author · 8 since 2021Theory of computation · 4 · 3 first-author · 3 since 2021Artificial intelligence and machine learning · 1 · 1 first-authorSystems, architecture and hardware · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1
YearPublicationVenuePosition
2026 Quokka#: Quantum Computing with #SAT
abstract
Abstract We present , a versatile, open-source Python library for quantum circuit analysis. reduces various simulation, verification, and synthesis tasks to weighted model counting (#SAT). It supports universal quantum circuits and a wide variety of gates. provides multiple encodings based on different algebraic bases and equivalence-checking methods, enabling key performance trade-offs. Moreover, the new version of adds approximate equivalence checking, which is crucial in its synthesis algorithms, since it enables translation between arbitrary gate sets. Its synthesis engine is depth-optimal, making it well-suited to real-world quantum computing. This paper demonstrates the design, extensibility, and use of .
Jingyi Mei, Dekel Zak, Muhammad Osama 0003, Tim Coopmans, Alfons Laarman
CAV (3)3
2025 Parallel Equivalence Checking of Stabilizer Quantum Circuits on GPUs
abstract
Abstract Equivalence checking plays a crucial role in quantum circuit compilation, optimization, and verification. Stabilizer circuits can be simulated classically by tracking the so-called stabilizer operators in linear time. But the simulation of large stabilizer circuits with thousands of qubits and gates, arising e.g. in the study of novel quantum error-correction protocols, still poses a challenge. In this work, we propose a GPU-based deterministic algorithm for equivalence checking of stabilizer circuits using the stabilizer tableau formalism. We explore various design choices and implement the most efficient version. Our algorithm significantly outperforms the state-of-the-art CCEC checker (which relies on the Stim simulator) in terms of time, memory, and energy. Our approach demonstrates up to two orders of magnitude speedup over existing methods. Notably, previous attempts at GPU acceleration in this area were unsuccessful, making this the first effective implementation.
Muhammad Osama 0003, Dimitrios Thanos, Alfons Laarman
TACAS (3)1
2024 Hitching a Ride to a Lasso: Massively Parallel On-The-Fly LTL Model Checking
abstract
Abstract The need for massively parallel algorithms, suitable to exploit the computational power of hardware such as graphics processing units, is ever increasing. In this paper, we propose a new algorithm for the on-the-fly verification of Linear-Time Temporal Logic (LTL) formulae [45] that is aimed at running on such devices. We prove its correctness and termination guarantee, and experimentally compare a GPU implementation with state-of-the-art LTL model checkers. Our new GPU LTL-checking algorithm is up to 150 $$\times $$ × faster on proving the correctness of a system than LTSmin running on a 32-core high-end CPU, and is more economic in using the available memory.
Muhammad Osama 0003, Anton Wijs
TACAS (2)1
2024 Certified SAT solving with GPU accelerated inprocessing
abstract
Abstract Since 2013, the leading SAT solvers in SAT competitions all use inprocessing, which, unlike preprocessing, interleaves search with simplifications. However, inprocessing is typically a performance bottleneck, in particular for hard or large formulas. In this work, we introduce the first attempt to parallelize inprocessing on GPU architectures. As one of the main challenges in GPU programming is memory locality, we present new compact data structures and devise a data-parallel garbage collector. It runs in parallel on the GPU to reduce memory consumption and improve memory locality. Our new parallel variable elimination algorithm is roughly twice as fast as previous work. Moreover, we augment the variable elimination with the first parallel algorithm for functional dependency extraction in an attempt to find more logical gates to eliminate that cannot be found with syntactic approaches. We present a novel algorithm to generate clausal proofs in parallel to validate all simplifications running on the GPU besides the CDCL search, giving high credibility to our solver and its use in critical applications such as model checkers. In experiments, our new solver ParaFROST solves numerous benchmarks faster on the GPU than its sequential counterparts. With functional dependency extraction, inprocessing in ParaFROST was more effective in reducing the solving time. Last but not least, all proofs generated by ParaFROST were successfully verified.
Muhammad Osama 0003, Anton Wijs, Armin Biere
Formal Methods Syst. Des.1
2023 GPUexplore 3.0: GPU Accelerated State Space Exploration for Concurrent Systems with Data
Anton Wijs, Muhammad Osama 0003
SPIN2
2023 A GPU Tree Database for Many-Core Explicit State Space Exploration
abstract
Abstract Various techniques have been proposed to accelerate explicit-state model checking with GPUs, but none address the compact storage of states, or if they do, at the cost of losing completeness of the checking procedure. We investigate how to implement a tree database to store states as binary trees in GPU memory. We present fine-grained parallel algorithms to find and store trees, experiment with a number of GPU-specific configurations, and propose a novel hashing technique, called Cleary-Cuckoo hashing, which enables the use of Cleary compression on GPUs. We are the first to assess the effectiveness of using a tree database, and Cleary compression, on GPUs. Experiments show processing speeds of up to 131 million states per second.
Anton Wijs, Muhammad Osama 0003
TACAS (1)2
2023 Innermost many-sorted term rewriting on GPUs
abstract
This article presents a way to implement many-sorted term rewriting on a GPU. This is done by letting the GPU repeatedly perform a massively parallel evaluation of all subterms. Innermost many-sorted term rewriting is experimentally compared with a relaxed form of innermost many-sorted term rewriting, and two different garbage collection mechanisms, to remove terms that are no longer needed, are discussed and experimentally compared. It is concluded that when the many-sorted term rewrite systems exhibit sufficient internal parallelism, GPU rewriting substantially outperforms the CPU. Both relaxed innermost many-sorted rewriting and garbage collection further improve this performance. Since the implementation can probably be even further optimised, and because in any case GPUs will become much more powerful in the future, this suggests that GPUs are an interesting platform for (many-sorted) term rewriting. As term rewriting can be viewed as a universal programming language, this also opens a route towards programming GPUs by term rewriting, especially for irregular computations.
Johri van Eerd, Jan Friso Groote, Pieter Hijma, Jan Martens 0001, Muhammad Osama 0003, Anton Wijs
Sci. Comput. Program.5
2021 GPU Acceleration of Bounded Model Checking with ParaFROST
abstract
Abstract The effective parallelisation of Bounded Model Checking is challenging, due to SAT and SMT solving being hard to parallelise. We present ParaFROST, which is the first tool to employ a graphics processor to accelerate BMC, in particular the simplification of SAT formulas before and repeatedly during the solving, known as pre- and inprocessing. The solving itself is performed by a single CPU thread. We explain the design of the tool, the data structures, and the memory management, the latter having been particularly designed to handle SAT formulas typically generated for BMC, i.e., that are large, with many redundant variables. Furthermore, the solver can make multiple decisions simultaneously. We discuss experimental results, having applied ParaFROST on programs from the Core C99 package of Amazon Web Services.
Muhammad Osama 0003, Anton Wijs
CAV (2)1
2021 SAT Solving with GPU Accelerated Inprocessing
abstract
Abstract Since 2013, the leading SAT solvers in the SAT competition all use inprocessing, which unlike preprocessing, interleaves search with simplifications. However, applying inprocessing frequently can still be a bottle neck, i.e., for hard or large formulas. In this work, we introduce the first attempt to parallelize inprocessing on GPU architectures. As memory is a scarce resource in GPUs, we present new space-efficient data structures and devise a data-parallel garbage collector. It runs in parallel on the GPU to reduce memory consumption and improves memory access locality. Our new parallel variable elimination algorithm is twice as fast as previous work. In experiments our new solver ParaFROST solves many benchmarks faster on the GPU than its sequential counterparts.
Muhammad Osama 0003, Anton Wijs, Armin Biere
TACAS (1)1
2020 Multiple Decision Making in Conflict-Driven Clause Learning
abstract
Most modern and successful SAT solvers are based on the Conflict-Driven Clause-Learning (CDCL) algorithm. The CDCL approach is to try to learn from previous assignments, and based on this, prune the search space to make better decisions in the future. In the current paper, we propose the introduction of a multiple decision maker (MDM) into CDCL. Adhering to a number of rules, MDM constructs sets of decisions to be made at once. Experiments show MDM has a considerably positive impact on CDCL, for many different SAT application problems. Overall, about 50% of the benchmarks we considered were solved faster when MDM was enabled, and the total processing time of all benchmarks was reduced by 6%. Moreover, MDM allowed 31 extra problems to be solved. We introduce MDM, analyse its impact, and try to understand the cause of that impact.
Muhammad Osama 0003, Anton Wijs
ICTAI1
2019 SIGmA: GPU Accelerated Simplification of SAT Formulas
Muhammad Osama 0003, Anton Wijs
IFM1
2019 Parallel SAT Simplification on GPU Architectures
abstract
The growing scale of applications encoded to Boolean Satisfiability (SAT) problems imposes the need for accelerating SAT simplifications or preprocessing. Parallel SAT preprocessing has been an open challenge for many years. Therefore, we propose novel parallel algorithms for variable and subsumption elimination targeting Graphics Processing Units (GPUs). Benchmarks show that the algorithms achieve an acceleration of 66 $$\times $$ over a state-of-the-art SAT simplifier (SatELite). Regarding SAT solving, we have conducted a thorough evaluation, combining both our GPU algorithms and SatELite with MiniSat to solve the simplified problems. In addition, we have studied the impact of the algorithms on the solvability of problems with Lingeling. We conclude that our algorithms have a considerable impact on the solvability of SAT problems.
Muhammad Osama 0003, Anton Wijs
TACAS (1)1
2018 An Efficient SAT-Based Test Generation Algorithm with GPU Accelerator
Muhammad Osama 0003, Lamya Gaber, Aziza I. Hussein, Hanafy Mahmoud
J. Electron. Test.1
2018 A Real-Time Heterogeneous Emulator of a High-Fidelity Utility-Scale Variable-Speed Variable-Pitch Wind Turbine
abstract
Wind energy has the highest development rates of renewables. The increasing complexity of wind turbine (WT) systems requires careful analysis and design with thorough testing and certification procedures. Hardware emulators contribute to safe and cost-effective assessment and testing of WT in research and industry. Most of the available emulators concentrate on emulating electrical subsystems with simplified mechanical models. In this paper, a real-time (RT) heterogeneous emulator that combines RT discrete-time step simulation and a high-fidelity linear parameter-varying model of a utility-scale WT system is proposed and implemented on a heterogeneous CPU/GPU platform. The RT emulator is built on an embedded NVIDIA Jetson TK1 board for a National Renewable Energy Laboratory 5-MW WT as a case study. The proposed emulator is capable of further integration of electrical models and control systems of WT.
Mohammed Moness, Muhammad Osama 0003, Ahmed Mahmoud Moustafa
IEEE Trans. Ind. Informatics2
2015 An Efficient Implementation of Ant Colony Optimization on GPU for the Satisfiability Problem
abstract
This paper focuses on solving the Boolean Satisfiability (SAT) problem using a parallel implementation of the Ant Colony Optimization (ACO) algorithm for execution on the Graphics Processing Unit (GPU) using NVIDIA CUDA (Compute Unified Device Architecture). We propose a new efficient parallel strategy for the ACO algorithm executed entirely on the CUDA architecture, and perform experiments to compare it with the best sequential version exists implemented on CPU with incomplete approaches. We show how SAT problem can benefit from the GPU solutions, leading to significant improvements in speed-up even though keeping the quality of the solution. Our results shows that the new parallel implementation executes up to 21x faster compared to its sequential counterpart.
Hassan A. Youness, Aziza Ibraheim, Mohammed Moness, Muhammad Osama 0003
PDP4