Demo Data from VLDB 2026 / reviewers in the wild / expert
J. Paul A. van der Wagt
dblp:163/4437
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1999
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 77% Integrated circuit design · 23% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
random-access memory |
0.0 | 1 | 1999 | Tunneling-based SRAM · Proc. IEEE 1999 |
Memory systems › random-access memory
SRAM |
0.0 | 1 | 1999 | Tunneling-based SRAM · Proc. IEEE 1999 |
Integrated circuit design
low-power circuit design |
0.0 | 1 | 1999 | Tunneling-based SRAM · Proc. IEEE 1999 |
Integrated circuit design › emerging device technologies
resonant tunneling diode |
0.0 | 1 | 1999 | Tunneling-based SRAM · Proc. IEEE 1999 |
Methods — techniques the papers use, named apart from their topics
resonant tunneling diodes · 0.0heterostructure field effect transistors · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1999 | Tunneling-based SRAMabstractThis paper describes a new high-density low-power circuit approach for implementing static random access memory (SRAM) using low current density resonant tunneling diodes (RTDs). After an overview of semiconductor random access memory architecture and technology, the concept of tunneling-based SRAM (TSRAM) is introduced. Experimental results for a compound semiconductor 1-bit 50-nW TSRAM gain cell using low current density (/spl sim/1 A/cm/sup 2/) RTDs and low-leakage heterostructure field effect transistors are presented. We describe a one-transistor TSRAM cell which could convert silicon dynamic RAM (DRAM) to ultradense SRAM if an ultralow current density (/spl sim/1 /spl mu/A/cm/sup 2/) silicon bistable device is developed. Finally, we present experimental and simulation results for a TSRAM cell using multipeaked I-V curve devices and a multivalued word line. This approach aims at increasing storage density through vertical integration of bistable devices such as RTD's. J. Paul A. van der Wagt |
Proc. IEEE | 1 |