Abstract In this short paper we introduce the notion of proof-based coverage. While traditional test coverage metrics measure which parts of the code are executed when a test passes, proof-based coverage aims to measure what parts of the code are required for a test to pass. Through formal verification, a proof of validity of an assertion is created. By mapping back the proof onto the source code, the essential parts can be marked, obtaining a novel coverage metric. We sketch a formalization of this notion, discuss the relationship to previous coverage metrics and show differences on small examples.

To address safety concerns in industrial systems, we propose a framework for forecasting CPU load with respect to a predetermined threshold, allowing customers to add tasks from a predefined library. Existing tools, akin to Windows Task Manager, provide limited insights due to their aggregate nature and high computational overhead. Our approach uses conformal prediction for rapid uncertainty-aware forecasts and Shapley value analysis to quantify individual task contributions to the CPU load. This proof-of-concept framework improves system safety assessment by addressing key research questions in load prediction and validation, paving the way for refined measurement methodologies in industrial applications.

Abstract Integrating machine learning into computer architecture simulation offers a new approach to performance analysis, moving away from traditional algorithmic methods. While existing simulators accurately replicate hardware, they often suffer from slow execution, complex documentation, and require deep CPU knowledge, limiting their usability for quick insights. This paper presents a deep learning-based approach for simulating a key CPU component, cache memory. Our model “learns” cache characteristics by observing cache miss distributions, without needing detailed manual modeling. This method accelerates simulations and adapts to different program needs, demonstrating accuracy comparable to traditional simulators. Tested on Sysbench and image processing algorithms, it shows promise for faster, scalable, and hardware-independent simulations.

Abstract The inference of program invariants over machine arithmetic, commonly called bit-vector arithmetic, is an important problem in verification. Techniques that have been successful for unbounded arithmetic, in particular Craig interpolation, have turned out to be difficult to generalise to machine arithmetic: existing bit-vector interpolation approaches are based either on eager translation from bit-vectors to unbounded arithmetic, resulting in complicated constraints that are hard to solve and interpolate, or on bit-blasting to propositional logic, in the process losing all arithmetic structure. We present a new approach to bit-vector interpolation, as well as bit-vector quantifier elimination (QE), that works by lazy translation of bit-vector constraints to unbounded arithmetic. Laziness enables us to fully utilise the information available during proof search (implied by decisions and propagation) in the encoding, and this way produce constraints that can be handled relatively easily by existing interpolation and QE procedures for Presburger arithmetic. The lazy encoding is complemented with a set of native proof rules for bit-vector equations and non-linear (polynomial) constraints, this way minimising the number of cases a solver has to consider. We also incorporate a method for handling concatenations and extractions of bit-vector efficiently.

The fifth generation of cellular wireless technol- ogy, 5G, bears the promise to transform the future network connectivity by providing seamless, low-latency and reliable interconnections between devices. In this paper, we focus on modeling and analyzing 5G service orchestration that deals with virtual network function placement, resource assignment and traffic routing, which are the building blocks of generating network slices catering to various application requirements. In order to ensure that a particular network slice works as stated by the application's service level agreement, it is essential that the constituent virtual network functions are placed in proper hosts, allocated adequate resources in terms of processing power, memory, bandwidth, and routed such that the constraints of the hosts and the network are met. This is a complex problem to solve if one considers the diverse set of requirements of 5G services. We tackle this problem by proposing a UML-based modeling and analysis framework, called UML5G Service Orchestration Profile, which allows one to describe 5G network slices and service orchestration via a specialized profile, and analyze as-sociated quality-of-service requirements by checking constraints expressed in Object Constraint Language. Our framework allows a designer to model any candidate orchestration scheme for 5G networks and verify if the network function placement, resource assignment, and routing guarantee the application's quality-of-service requirements, at design time. We evaluate the framework on a prototype implementation of an orchestration algorithm that generates a multitude of allocation configurations that we automatically check against requirements formalized in Object Constraint Language. Our contribution facilitates modeling and design-time evaluation of network slicing and service orchestration schemes in 5G-based solutions.

The inference of program invariants over machine arithmetic, commonly called bit-vector arithmetic, is an important problem in verification. Techniques that have been successful for unbounded arithmetic, in particular Craig interpolation, have turned out to be difficult to generalise to machine arithmetic: existing bit-vector interpolation approaches are based either on eager translation from bit-vectors to unbounded arithmetic, resulting in complicated constraints that are hard to solve and interpolate, or on bit-blasting to propositional logic, in the process losing all arithmetic structure. We present a new approach to bit-vector interpolation, as well as bit-vector quantifier elimination (QE), that works by lazy translation of bit-vector constraints to unbounded arithmetic. Laziness enables us to fully utilise the information available during proof search (implied by decisions and propagation) in the encoding, and this way produce constraints that can be handled relatively easily by existing interpolation and QE procedures for Presburger arithmetic. The lazy encoding is complemented with a set of native proof rules for bit-vector equations and non-linear (polynomial) constraints, this way minimising the number of cases a solver has to consider.