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Huaxiang Yin

dblp:166/7212 · DBLP profile ↗
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5ranked-venue papers
0as first author
3since 2021 · last 2025
0000-0001-8066-6002ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 5 · 3 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
5 papers
Integrated circuit design · 77% Memory systems · 13% Hardware reliability and fault tolerance · 10%

Topics — the 15 heaviest of 15, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › semiconductor devices › multi-gate devices
FinFET
1.222024
Effects of the VGS sweep range on the short channel effect in negative capacitance FinFETs · Sci. China Inf. Sci. 2024
Influence of an ALD TiN capping layer on the PBTI characteristics of n-FinFET with ALD HfO2/TiN-capping/TiAl gate stacks · Sci. China Inf. Sci. 2020
Memory systems › non-volatile memory
ferroelectric memory
0.912025
An AND-type 1T-FeFET array with robust write and read operations · Sci. China Inf. Sci. 2025
Integrated circuit design
memory circuit design
0.912025
An AND-type 1T-FeFET array with robust write and read operations · Sci. China Inf. Sci. 2025
Integrated circuit design
low-power circuit design
0.812024
Effects of the VGS sweep range on the short channel effect in negative capacitance FinFETs · Sci. China Inf. Sci. 2024
Integrated circuit design › emerging device technologies
negative capacitance FET
0.812024
Effects of the VGS sweep range on the short channel effect in negative capacitance FinFETs · Sci. China Inf. Sci. 2024
Integrated circuit design › semiconductor devices
semiconductor device design
0.812024
Effects of the VGS sweep range on the short channel effect in negative capacitance FinFETs · Sci. China Inf. Sci. 2024
Integrated circuit design › emerging device technologies
ferroelectric devices
0.712023
Recent progress of hafnium oxide-based ferroelectric devices for advanced circuit applications · Sci. China Inf. Sci. 2023
Hardware reliability and fault tolerance › aging
bias temperature instability
0.412020
Influence of an ALD TiN capping layer on the PBTI characteristics of n-FinFET with ALD HfO2/TiN-capping/TiAl gate stacks · Sci. China Inf. Sci. 2020
Integrated circuit design
semiconductor devices
0.412020
Influence of an ALD TiN capping layer on the PBTI characteristics of n-FinFET with ALD HfO2/TiN-capping/TiAl gate stacks · Sci. China Inf. Sci. 2020
Integrated circuit design › semiconductor devices › semiconductor device design
transistor design
0.412020
Single-event-transient effects in silicon-on-insulator ferroelectric double-gate vertical tunneling field effect transistors · Sci. China Inf. Sci. 2020
Integrated circuit design › emerging device technologies
tunneling field effect transistor
0.412020
Single-event-transient effects in silicon-on-insulator ferroelectric double-gate vertical tunneling field effect transistors · Sci. China Inf. Sci. 2020
Memory systems
non-volatile memory
0.212023
Recent progress of hafnium oxide-based ferroelectric devices for advanced circuit applications · Sci. China Inf. Sci. 2023
Hardware reliability and fault tolerance
aging
0.112020
Influence of an ALD TiN capping layer on the PBTI characteristics of n-FinFET with ALD HfO2/TiN-capping/TiAl gate stacks · Sci. China Inf. Sci. 2020
Hardware reliability and fault tolerance › soft errors
single event transient
0.112020
Single-event-transient effects in silicon-on-insulator ferroelectric double-gate vertical tunneling field effect transistors · Sci. China Inf. Sci. 2020
Hardware reliability and fault tolerance
soft errors
0.112020
Single-event-transient effects in silicon-on-insulator ferroelectric double-gate vertical tunneling field effect transistors · Sci. China Inf. Sci. 2020

Methods — techniques the papers use, named apart from their topics

TCAD simulation · 0.8atomic layer deposition · 0.4
YearPublicationVenuePosition
2025 An AND-type 1T-FeFET array with robust write and read operations
Haoji Qian, Jiani Gu, Gaobo Lin, Rongzong Shen, Xinda Song, Yian Ding, Minglei Ma, Gaobo Xu, Huaxiang Yin, Chengji Jin, Genquan Han
Sci. China Inf. Sci.18
2024 Effects of the VGS sweep range on the short channel effect in negative capacitance FinFETs
Zhaohao Zhang, Jiaxin Yao, Qingzhu Zhang, Gaobo Xu, Genquan Han, Huaxiang Yin
Sci. China Inf. Sci.10
2023 Recent progress of hafnium oxide-based ferroelectric devices for advanced circuit applications
Zhaohao Zhang, Guoliang Tian, Jiali Huo, Qingzhu Zhang, Gaobo Xu, Huaxiang Yin
Sci. China Inf. Sci.10
2020 Single-event-transient effects in silicon-on-insulator ferroelectric double-gate vertical tunneling field effect transistors
Guoliang Tian, Jinshun Bi, Gaobo Xu, Xueqin Yang, Sandip Majumdar, Huaxiang Yin, Qiuxia Xu, Wenwu Wang 0006
Sci. China Inf. Sci.7
2020 Influence of an ALD TiN capping layer on the PBTI characteristics of n-FinFET with ALD HfO2/TiN-capping/TiAl gate stacks
Luwei Qi, Xueli Ma, Yongliang Li, Huaxiang Yin, Huilong Zhu, Wenwu Wang 0006, Tian-Chun Ye 0001
Sci. China Inf. Sci.10