Demo Data from VLDB 2026 / reviewers in the wild / expert
Kam Cheng
dblp:167/6587
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1986
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% | |
| Computer networks
1 paper |
Physical-layer communications · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › digital signal processing circuits
finite impulse response filter |
0.0 | 1 | 1986 | VLSI Architectures for the Finite Impulse Response Filter · IEEE J. Sel. Areas Commun. 1986 |
Integrated circuit design › digital circuit design
VLSI architecture |
0.0 | 1 | 1986 | VLSI Architectures for the Finite Impulse Response Filter · IEEE J. Sel. Areas Commun. 1986 |
Physical-layer communications
digital signal processing |
0.0 | 1 | 1986 | VLSI Architectures for the Finite Impulse Response Filter · IEEE J. Sel. Areas Commun. 1986 |
Methods — techniques the papers use, named apart from their topics
VLSI design · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1986 | VLSI Architectures for the Finite Impulse Response FilterabstractWe review the various VLSI architectures that have been proposed for the finite impulse response filter problem. In addition, new architectures are proposed and improved designs for some of the earlier architectures are developed. Kam Cheng, Sartaj Sahni |
IEEE J. Sel. Areas Commun. | 1 |