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Antony J. Wilkinson

dblp:17/2840 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2010
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 50% Integrated circuit design · 50%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › analog and mixed-signal circuits
analog circuit design
0.112010
Automated Model Generation Algorithm for High-Level Fault Modeling · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010
Electronic design automation › hardware verification and test
analog circuit testing
0.112010
Automated Model Generation Algorithm for High-Level Fault Modeling · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010
Electronic design automation
hardware verification and test
0.112010
Automated Model Generation Algorithm for High-Level Fault Modeling · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010
Integrated circuit design › analog and mixed-signal circuits › analog circuit design
operational amplifier
0.112010
Automated Model Generation Algorithm for High-Level Fault Modeling · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010

Methods — techniques the papers use, named apart from their topics

multiple model generation system using delta · 0.1automated model generation · 0.1adaptive self-tuning · 0.1
YearPublicationVenuePosition
2010 Automated Model Generation Algorithm for High-Level Fault Modeling
abstract
High-level modeling for operational amplifiers (opamps) has been previously carried out successfully using models generated by published automated model generation approaches. Furthermore, high-level fault modeling (HLFM) has been shown to work reasonably well using manually designed fault models. However, no evidence shows that published automated model generation approaches based on opamps have been used in HLFM. This paper describes HLFM for analog circuits using an adaptive self-tuning algorithm called multiple model generation system using delta. The generation algorithms and simulation models were written in MATLAB and the hardware description language VHDL-AMS, respectively. The properties of these self-tuning algorithms were investigated by modeling complementary metal-oxide-semiconductor opamps, and comparing simulations using the HLFM against those of the original simulation program with integrated circuit emphasis circuit utilizing transient analysis. Results show that the models can handle both linear and nonlinear fault situations with better accuracy than previously published HLFMs.
Likun Xia, Ian M. Bell, Antony J. Wilkinson
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2008 A novel approach for automated model generation
abstract
Automatic approaches for macromodel generation from SPICE-level descriptions have been of great interest over the last few years for the design of large, complex mix- signal SoCs (system-on-chips) and SiPs (system-in-packages). In this paper a novel approach termed multiple model generation system (MMGS) is developed for extracting either single-input single-output (SISO) or multiple-input single-output (MISO) macromodels from a SPICE netlist. This model generation process detects nonlinearity through variations in output error. Examples of the application of MMGS are presented for simple two-input systems incorporating a two-stage CMOS operational amplifier (op amp).
Likun Xia, Ian M. Bell, Antony J. Wilkinson
ISCAS3