While high-density NAND flash memory, such as triple-level-cell (TLC) memory achieves enhanced storage capacity and cost efficiency by storing three bits per cell compared to the single-level-cell (SLC) flash memory, it exhibits compromised I/O throughput and reduced endurance. To mitigate the intrinsic limitations of TLC flash memory, contemporary designs employ hybrid architectures that reconfigure designated TLC chips to operate in the SLC mode, forming an efficient cache to address latency and endurance constraints inherent to conventional TLC implementations. However, it is challenging to optimize the SLC cache, such as the granularity of cached data and cold/hot data separation. In this paper, we propose supporting a two-level hierarchy (i.e. L1 and L2) of SLC cache stores based on the varying granularity of cached, and we present a mathematical model to direct the segmentation of the L1 and the L2 cache in the SLC region, by considering the garbage collection counts in both level caches, and the write size characteristics of user applications. Besides, we introduce a scheme to select the garbage collection (GC) victim block for retaining the hot data pages in the SLC cache and then improving I/O responsiveness. The evaluation results show that our proposal can improve I/O performance by between 5.4% and 63.3%, in contrast to existing cache management schemes for SLC-TLC hybrid storage.

Although high-density NAND flash memory, such as triple-level-cell (TLC) flash memory can offer high density, its lower write performance and endurance compared to single-level-cell (SLC) flash memory are impediments to the proliferation of TLC products. To overcome such disadvantages of TLC flash memory, hybrid architectures, which integrate a portion of SLC chips and employ them as a write cache, are widely adopted in commercial solid-state disks (SSDs). However, it is challenging to optimize the SLC cache, such as the granularity of cached data and the cold/hot data separation. In this paper, we propose supporting two-level hierarchy (i.e. L1 and L2) of SLC cache stores based on varying granularity of cached data. Moreover, we support the segmentation of the L1 and the L2 cache in the SLC region with a dynamic manner, by considering the write size characteristics of user applications. The evaluation results show that our proposal can improve I/O performance by between 12.6% and 25.1%, in contrast to existing cache management schemes for SLC-TLC hybrid storage.

Modern solid state drives (SSDs) are composed of a four-level parallel structure, including channels, chips, dies, and planes, to enhance SSD performance with maximum access parallelism. Because the planes within the same die share the same set of control units and peripheral circuits, it generally has to open multiple aligned blocks to enable access parallelism through multi-plane (MP) operations. Such a passive method, however, cannot effectively exploit plane level parallelism, since MP operations can only be triggered when the accessed data pages have the same offset address across the planes. In addition, it will worsen the block open time issue, as multiple aligned blocks are opened to enable MP operations for simultaneous data writing. This, in turn, increases the error rate when reading data from blocks with long open time. This paper introduces SetMP, a novel approach that proactively aggregates requests to exploit plane level parallelism through set associative management. By increasing the frequency of MP operations, SetMP enhances I/O responsiveness while reducing the open time of block associated with maintaining multiple open blocks for MP operations. Evaluation results demonstrate that SetMP achieves an average reduction in I/O latency of 16.9%, without significantly increasing the open time of block, outperforming existing optimization schemes.

This article investigates consensus problems of multiple-input-multiple-output (MIMO) linear multiagent systems (MASs) with directed topology under event-triggered (ET) sampling. First, an observer based on relative outputs is designed to estimate relative full states by utilizing an unknown input observer technique. Second, a controller with static coupling strength and a dynamic ET mechanism (DETM) is proposed. And by developing a Lyapunov function, we show that asymptotical consensus is achieved if the coupling strength is larger than a positive threshold. The threshold, however, depends on some global parameters which are difficult to acquire. Later, an adaptive controller with dynamic coupling strengths as well as a DETM is proposed. And we show that asymptotical consensus is achieved in a fully distributed fashion. Moreover, we show Zeno behavior is avoided. Finally, two examples are given to validate theoretical results.