VLDB 2026 Research / reviewers in the wild / expert
Zhengguo Chen
dblp:176/1003
· DBLP profile ↗
7ranked-venue papers
3as first author
4since 2021 · last 2023
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 first-author · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 2 · 2 since 2021Computer networks · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 67% Storage systems · 33% | |
| Network and information security
1 paper |
Hardware security and side channels · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware security and side channels › memory integrity
memory integrity verification |
0.5 | 1 | 2021 | CacheTree: Reducing Integrity Verification Overhead of Secure Nonvolatile Memories · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Storage systems
merkle tree |
0.5 | 1 | 2021 | CacheTree: Reducing Integrity Verification Overhead of Secure Nonvolatile Memories · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Memory systems
non-volatile memory |
0.5 | 1 | 2021 | CacheTree: Reducing Integrity Verification Overhead of Secure Nonvolatile Memories · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Memory systems › non-volatile memory
secure non-volatile memory |
0.5 | 1 | 2021 | CacheTree: Reducing Integrity Verification Overhead of Secure Nonvolatile Memories · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 |
Methods — techniques the papers use, named apart from their topics
write-back policy · 1.0metadata cache · 1.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2023 | Impact of FOSB on Tumor Microenvironment and Immunotherapy in Pan-CancerabstractFOSB has different expressions in gastric, breast, and pancreatic cancers. At the same time, FOSB plays an important role in the research of cancer prognosis and treatment. In this paper, the effect and influence of FOSB on tumor microenvironment(TME) and immunotherapy in Pan-Cancer were analyzed. The results show that positively significant correlation between FOSB expression and TME in a variety of cancers. For immunotherapy, the high expression of FOSB always makes a higher immunotherapy score than the low expression. Changlin Liu, Gang He 0001, Zhengguo Chen |
BIBM | 3 |
| 2023 | A Novel Diffusion-Model-Based OCT Image Inpainting Algorithm for Wide Saturation Artifacts
Bangning Ji, Gang He 0001, Zhengguo Chen |
PRCV (13) | 3 |
| 2023 | A Two-Stage Whole Body Bone SPECT Scan Image Inpainting Algorithm for Residual Urine Artifacts Based on Contextual Attention
Pingxiang Zhou, Gang He 0001, Zhengguo Chen |
PRCV (13) | 3 |
| 2021 | CacheTree: Reducing Integrity Verification Overhead of Secure Nonvolatile MemoriesabstractEmerging nonvolatile memories (NVMs), while exhibiting great potential to be DRAM alternatives, are vulnerable to security attacks. Secure NVM designs demand data persistence on top of traditional confidentiality and integrity protection. A simple adaption of existing secure memory designs would incur non-negligible overheads, including performance degradation, NVM lifetime reduction, and energy consumption increase. In this article, we propose CacheTree to address the integrity verification overhead for secure NVMs. By constructing extra Merkle trees (MTs) on top of metadata cache, CacheTree helps to authenticate the volatile cache contents, which enables the adoption of write-back policy and prevents frequent NVM writes in persisting metadata. We then adopt CacheTree to address the integrity verification in secure NVM, in particular, the overheads in persisting message authentication codes (for protecting the integrity of user data at memory line level) and persisting the main MT (for protecting the integrity of the whole memory space). Our experimental results show that CacheTree, with less than 0.5% storage overhead, achieves up to 20.1% performance improvement, 44.3% lifetime increase, and 43.7% energy consumption reduction over the state-of-the-art solutions. Zhengguo Chen, Youtao Zhang, Nong Xiao 0001 |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2019 | DWMAcc: Accelerating Shift-based CNNs with Domain Wall MemoriesabstractPIM (processing-in-memory) based hardware accelerators have shown great potentials in addressing the computation and memory access intensity of modern CNNs (convolutional neural networks). While adopting NVM (non-volatile memory) helps to further mitigate the storage and energy consumption overhead, adopting quantization, e.g., shift-based quantization, helps to tradeoff the computation overhead and the accuracy loss, integrating both NVM and quantization in hardware accelerators leads to sub-optimal acceleration. In this paper, we exploit the natural shift property of DWM (domain wall memory) to devise DWMAcc, a DWM-based accelerator with asymmetrical storage of weight and input data, to speed up the inference phase of shift-based CNNs. DWMAcc supports flexible shift operations to enable fast processing with low performance and area overhead. We then optimize it with zero-sharing , input-reuse , and weight-share schemes. Our experimental results show that, on average, DWMAcc achieves 16.6× performance improvement and 85.6× energy consumption reduction over a state-of-the-art SRAM based design. Zhengguo Chen, Quan Deng 0003, Nong Xiao 0001, Kirk Pruhs, Youtao Zhang |
ACM Trans. Embed. Comput. Syst. | 1 |
| 2017 | KV-FTL: A novel key-value based FTL scheme for large scale SSDsabstractBoth traditional coarse-grained and fine-grained Flash Translation Layer schemes are unsuitable for ultra-large SSDs. They produce overmuch mapping entries which fail to be kept in embedded DRAM completely and can suffer severely from low spatial and temporal localities. In this paper, we propose a novel KV-FTL for ultra-large SSDs, which mostly maps logical addresses to physical addresses via a simple hash function, while handles hash collisions and out-of-place data updates by the traditional manner, i.e., the mapping table. Our KV-FTL can accelerate address translation by avoiding loading mapping table from flash memory to DRAM, thus improve performance; as well as reduce the write-traffic incurred by the mapping table, thus extend the lifespan of SSDs. Experimental results show that our KV-FTL facilitates SSDs to survive longer lifespan by a factor of up to 18.7% with an average of 13.6%; improves read performance ranging from 18.4% to 50.7% with an average of 39% with optimization, and in the case of extremely intensive requests, improves the access performance for requests with an average of 47%. Zhengguo Chen, Zhiguang Chen 0001, Nong Xiao 0001, Fang Liu 0002 |
ASAP | 2 |
| 2015 | NF-Dedupe: A novel no-fingerprint deduplication scheme for flash-based SSDsabstractNAND flash-based Solid State Drives (SSDs) have been widely deployed in data centers of cloud computing due to their high performance compared with hard disks, while the limited lifespan of flash memory makes SSDs not very suitable for write-intensive applications. Deduplication is an effective method used to reduce the write traffic of applications thus can be used to extend the lifespan of SSDs. However, traditional deduplication schemes rely on the time-consuming fingerprint computing process to find duplicated data, which may impair the write performance of SSDs. Accordingly, Pre-hashing was proposed to reduce the chances of fingerprint computing thus improving the performance of SSDs with deduplication, but at the cost of degrading deduplication rate. In this paper, we propose NF-Dedupe, a new deduplication scheme that needs no fingerprint computing for flash-based SSDs. NF-Dedupe determines whether a write page is duplicated or not by comparing the write page with its potential duplicated page read from underlying flash chips byte by byte, rather than relying on the comparison of fingerprints. As flash memory is known for its high parallelism and low read latency, reading a page from flash chip and comparing two pages byte by byte introduce lower overhead than the fingerprint computing does. We evaluate the NF-Dedupe via trace-driven simulations. Experimental results have shown that NF-Dedupe outperforms the other approaches and can achieve the deduplication rate ranging from 5.3% to 29.9% and the write latency is improved by a factor of up to 21% with an average of 12%. Zhengguo Chen, Zhiguang Chen 0001, Nong Xiao 0001, Fang Liu 0002 |
ISCC | 1 |