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William P. Lidinsky

dblp:177/1228 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1973
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › microprogramming
microprogrammed processor design
0.011973
A Research-Oriented Dynamic Microprocessor · IEEE Trans. Computers 1973
Processor architecture and microarchitecture
microprogramming
0.011973
A Research-Oriented Dynamic Microprocessor · IEEE Trans. Computers 1973

Methods — techniques the papers use, named apart from their topics

microprogramming · 0.0
YearPublicationVenuePosition
1973 A Research-Oriented Dynamic Microprocessor
abstract
A horizontally structured microprogrammable processor (AMP) designed as a tool for microcontrol, language, and processor design research, is described. The machine employs a minimally encoded microcontrol word, a very general multiple bus structure, highspeed local storage, several arithmetic/logic units, and completely asynchronous memory referencing. These features combine to yield substantial low-evel parallelism and a highly versatile microinstruction. In addition, hardware modification is easily accomplished, further supporting the experimental nature of the processor.
Robert G. Barr, Jerome A. Becker, William P. Lidinsky, Vernon V. Tantillo
IEEE Trans. Computers3