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Ivan Schreter

dblp:177/6046 · DBLP profile ↗
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5ranked-venue papers
0as first author
0since 2021 · last 2020
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Databases, data management, data science and information retrieval · 5

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Storage systems · 43% Cloud and datacenter computing · 29% Memory systems · 19%
Databases, data mining, and information retrieval
2 papers
Indexing and storage engines · 91% Query processing and optimization · 9%

Topics — the 8 heaviest of 10, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Storage systems
key-value storage
0.412020
Enabling Low Tail Latency on Multicore Key-Value Stores · Proc. VLDB Endow. 2020
Cloud and datacenter computing › quality of service
tail latency
0.412020
Enabling Low Tail Latency on Multicore Key-Value Stores · Proc. VLDB Endow. 2020
Indexing and storage engines › storage management
non-volatile memory integration
0.312017
SAP HANA Adoption of Non-Volatile Memory · Proc. VLDB Endow. 2017
Memory systems
non-volatile memory
0.312017
SAP HANA Adoption of Non-Volatile Memory · Proc. VLDB Endow. 2017
Indexing and storage engines
columnar storage
0.212016
Page As You Go: Piecewise Columnar Access In SAP HANA · SIGMOD Conference 2016
Indexing and storage engines › column store
main-memory column store
0.212016
Page As You Go: Piecewise Columnar Access In SAP HANA · SIGMOD Conference 2016
Storage systems › file systems › write-optimized file system
log-structured file system
0.112020
Enabling Low Tail Latency on Multicore Key-Value Stores · Proc. VLDB Endow. 2020
Storage systems › storage reliability
durability
0.112017
SAP HANA Adoption of Non-Volatile Memory · Proc. VLDB Endow. 2017

Methods — techniques the papers use, named apart from their topics

byte-addressable NVRAM · 0.6message-passing communication · 0.4asynchronous programming model · 0.4run-length encoding · 0.2order-preserving dictionary · 0.2inverted index · 0.2
YearPublicationVenuePosition
2020 Enabling Low Tail Latency on Multicore Key-Value Stores
abstract
Modern applications employ key-value stores (KVS) in at least some point of their software stack, often as a caching system or a storage manager. Many of these applications also require a high degree of responsiveness and performance predictability. However, most KVS have similar design decisions which focus on improving throughput metrics, at times by sacrificing latency. While latency can be occasionally reduced by over provisioning hardware, this entails significant increase in costs. In this paper we present RStore, a KVS which focus on low tail latency as its primary goal, while also enabling efficient usage of hardware resources. To that aim, we argue in favor of techniques such as an asynchronous programming model, message-passing communication, and log-structured storage on modern hardware. Throughout the paper we discuss these and other design decisions of RStore that differ from those of more traditional systems. Our evaluation shows that RStore scales its throughput with an increasing number of cores while maintaining a robust behavior with low and predictable latency.
Lucas Lersch, Ivan Schreter, Ismail Oukid, Wolfgang Lehner
Proc. VLDB Endow.2
2017 Rethinking DRAM Caching for LSMs in an NVRAM Environment
Lucas Lersch, Ismail Oukid, Ivan Schreter, Wolfgang Lehner
ADBIS3
2017 An analysis of LSM caching in NVRAM
abstract
The rise of NVRAM technologies promises to change the way we think about system architectures. In order to fully exploit its advantages, it is required to develop systems specially tailored for NVRAM devices. Not only this imposes great challenges, but developing full system architectures from scratch is undesirable in many scenarios due to prohibitive development costs. Instead, we analyze in this paper the behavior of an existing log-structured persistent key-value store, namely LevelDB, when run on top of an emulated NVRAM device. We investigate initial opportunities for improvement when adapting a system tailored for HDD/SSDs to run on top of an NVRAM environment. Furthermore, we analyze the behavior of the legacy DRAM caching component of LevelDB and whether more suitable caching policies are required.
Lucas Lersch, Ismail Oukid, Wolfgang Lehner, Ivan Schreter
DaMoN4
2017 SAP HANA Adoption of Non-Volatile Memory
abstract
Non-Volatile RAM (NVRAM) is a novel class of hardware technology which is an interesting blend of two storage paradigms: byte-addressable DRAM and block-addressable storage (e.g. HDD/SSD). Most of the existing enterprise relational data management systems such as SAP HANA have their internal architecture based on the inherent assumption that memory is volatile and base their persistence on explicit handling of block-oriented storage devices. In this paper, we present the early adoption of Non-Volatile Memory within the SAP HANA Database, from the architectural and technical angles. We discuss our architectural choices, dive deeper into a few challenges of the NVRAM integration and their solutions, and share our experimental results. As we present our solutions for the NVRAM integration, we also give, as a basis, a detailed description of the relevant HANA internals.
Mihnea Andrei, Christian Lemke, Günter Radestock, Robert Schulze, Carsten Thiel, Rolando Blanco, Akanksha Meghlan, Muhammad Sharique, Sebastian Seifert, Surendra Vishnoi, Daniel Booss, Thomas Peh, Ivan Schreter, Werner Thesing, Mehul Wagle, Thomas Willhalm
Proc. VLDB Endow.13
2016 Page As You Go: Piecewise Columnar Access In SAP HANA
abstract
In-memory columnar databases such as SAP HANA achieve extreme performance by means of vector processing over logical units of main memory resident columns. The core in-memory algorithms can be challenged when the working set of an application does not fit into main memory. To deal with memory pressure, most in-memory columnar databases evict candidate columns (or tables) using a set of heuristics gleaned from recent workload. As an alternative approach, we propose to reduce the unit of load and eviction from column to a contiguous portion of the in-memory columnar representation, which we call a page. In this paper, we adapt the core algorithms to be able to operate with partially loaded columns while preserving the performance benefits of vector processing. Our approach has two key advantages. First, partial column loading reduces the mandatory memory footprint for each column, making more memory available for other purposes. Second, partial eviction extends the in-memory lifetime of partially loaded column. We present a new in-memory columnar implementation for our approach, that we term page loadable column. We design a new persistency layout and access algorithms for the encoded data vector of the column, the order-preserving dictionary, and the inverted index. We compare the performance attributes of page loadable columns with those of regular in-memory columns and present a use-case for page loadable columns for cold data in data aging scenarios. Page loadable columns are completely integrated in SAP HANA, and we present extensive experimental results that quantify the performance overhead and the resource consumption when these columns are deployed.
Reza Sherkat, Colin Florendo, Mihnea Andrei, Anil K. Goel, Anisoara Nica, Peter Bumbulis, Ivan Schreter, Günter Radestock, Christian Bensberg, Daniel Booss, Heiko Gerwens
SIGMOD Conference7