Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page
Demo Data from VLDB 2026 / reviewers in the wild / expert

Ryozo Sakai

dblp:178/3946 · DBLP profile ↗
← Back
1ranked-venue papers
0as first author
0since 2021 · last 1971
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware reliability and fault tolerance · 100%
Theoretical computer science
1 paper
Coding theory · 100%

Topics — the 1 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance › self-checking circuits
fail-safe sequential machine		 0.011971
Realization of Fail-Safe Sequential Machines by Using a k-out-of-n Code · IEEE Trans. Computers 1971
YearPublicationVenuePosition
1971 Realization of Fail-Safe Sequential Machines by Using a k-out-of-n Code
abstract
A fail-safe sequential machine is one that produces safe-side output when failures occur in the machine. This paper presents a new method of realization of fail-safe sequential machines under the following assumptions: 1) failure is caused by a single fault of element in the machine, 2) output of faulty element is stuck at one or zero, and 3) input does not malfunction.
Yoshihiro Tohma, Yasuyoshi Ohyama, Ryozo Sakai
 IEEE Trans. Computers3