Demo Data from VLDB 2026 / reviewers in the wild / expert
G. Robert Redinpo
dblp:178/4073
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1971
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% | |
| Theoretical computer science
1 paper |
Coding theory · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
digital circuit design |
0.0 | 1 | 1971 | An Implementation Technique for Walsh Functions · IEEE Trans. Computers 1971 |
Coding theory › boolean functions
walsh functions |
0.0 | 1 | 1971 | An Implementation Technique for Walsh Functions · IEEE Trans. Computers 1971 |
Methods — techniques the papers use, named apart from their topics
serial and parallel generation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1971 | An Implementation Technique for Walsh FunctionsabstractA technique is presented for the generation of any finite set of Walsh functions in both serial and parallel form. It uses a straightforward constructive definition of these functions. In order to simultaneously generate the first 2nfunctions, [(22n-1)/3] storage devices and (2n+2-5) logic gates are required. G. Robert Redinpo |
IEEE Trans. Computers | 1 |