A sequential sweeping receiver with fast switching time has been recently shown to be much more effective at spectrum scanning for cognitive radio applications than a compressed sensing receiver under similar hardware constraints. This paper presents a design of such rapid spectrum sweeping scanner. The design leverages the harmonics of hard-switching current-driven passive mixer to sense an arbitrary subband in the spectrum and downconvert it to baseband without the need for a wide-range tunable local oscillator (LO). The design operates as a frequency multiplexer with fast transient switching. The proposed scanner is designed and simulated in 65nm CMOS technology and achieves 4.8-dB minimum noise Figure and total power consumption of 38 mW from 1V supply voltage. The switching time to select a frequency bin is approximately three time constants of the corresponding frequency bin bandwidth.

This paper presents a new approach to compensate for mismatches in capacitor array of a successive-approximation-register (SAR) analog-to-digital converter (ADC). The proposed approach employs multiple comparisons per bit cycle before making a decision. Instead of taking the majority vote as has been done in existing work, different threshold values are used to compensate for the transition level reference voltage errors caused by capacitor mismatches. A closed-form expression of the effective comparator noise as a function of different threshold value shifts and number of votes is derived. Simulation results of an 8-bit SAR ADC show that the proposed scheme achieves near ideal ENOB and SFDR performance.

In this paper, a second-order bang-bang digital phase-locked loop (BBPLL) with dominant random walk phase noise and transport delay is analyzed using Fokker-Plank equations. Explicit closed-form expressions are derived for the timing error probability distribution function, jitter variance, and power spectral density (psd). For the type-II BBPLL considered in this paper, the timing error distribution is shown to be Laplacian and not Gaussian distributed as previously assumed, while the derived psd is Lorentzian, which is consistent with earlier works. The analytical solutions are valid as long as the continuous-time approximation of the BBPLL dynamics is accurate as is the case for typical operating loop bandwidths. The accuracy of the derived expressions is validated via simulation.

With increased levels of integration in modern system-on-chips, the coupling of supply noise in a phase-locked loop (PLL) has become the dominant source of performance degradation in many systems. In this paper, an all-digital approach to canceling the effects of supply noise is presented. By sensing the supply noise using an analog-to-digital converter (ADC), an observer-controller loop filter jointly processes the ADC and phase detector outputs to determine the oscillator control signals that minimize the output jitter. The proposed digital PLL is shown to be significantly more robust to supply noise compared with a conventional PLL.

When operating at scaled supply voltages, the primary source of performance degradation in a successive approximation register (SAR) analog-to-digital converter (ADC) is the comparator thermal noise. Low-noise comparator can be used but at the expense of increased power dissipation. This paper presents an approach to reduce the comparator power in SAR ADCs. A mathematical model of a SAR ADC derived in this paper suggests that using the same comparator noise variance for each bit cycle is suboptimal and results in more power consumption than necessary. A noise programmable comparator based on majority vote technique is proposed to adjust the comparator noise performance at each bit step. As a proof of concept, a 10-bit SAR ADC that operates at 0.5-V supply voltage and supports a flexible differential input dynamic range from 0.4 to 1 V has been fabricated in 65-nm CMOS process. The prototype achieves an effective number of bits ranging from 7.1 to 9.1 bits and a figure of merit from 3.3 to 6.8 fJ/conversion step while operating at 250 kS/s.

This paper presents a method for estimating the in-phase/quadrature-phase (I/Q) mismatch in low-intermediate frequency receivers for orthogonal frequency division multiplexing (OFDM) signals in the presence of carrier-frequency offset. The proposed estimator operates on the repetitive training sequence of the OFDM packet preamble. To derive a practical maximum-likelihood estimator, an invertible mapping operation is applied on the observation vectors, so that a closed-form expression of the likelihood function can be obtained. The proposed estimator is shown to achieve the Cramer Rao lower bound at high image signal power levels. The error variance of the estimator is analyzed, which closely matches simulation results. The uncoded bit-error-rate is shown via simulation to be approximately that of an ideal receiver without I/Q mismatch.

We investigate the performance of orthogonal frequency division multiplexing (OFDM)-based dual-hop amplify-and-forward (AF) relay networks in the presence of phase noise (PHN). We show that the use of an AF relay may not be beneficial compared to a direct transmission in the presence of PHN. Using outage probability analysis, an upper bound on the allowable PHN level is derived which ensures that the dual-hop outperforms the direct transmission. To improve dual-hop transmission performance in the presence of PHN, we propose a reduced-complexity joint channel and PHN estimator using full-pilot OFDM symbols for AF relay transmission. The proposed approach achieves a lower mean squared error compared to the conventional channel estimator. In addition, we derive a joint data detection and PHN estimation scheme for comb-type data OFDM symbols by modifying the maximum ratio combining metric to account for the effect of PHN at the destination node.

In this paper, we propose a robust non-iterative pilot-aided channel estimator for multi-input multi-output orthogonal frequency division multiplexing systems in the presence I/Q imbalance and phase noise. We show that by exploiting the phase noise and I/Q imbalance properties, the joint cost function for estimating them reduces to separate cost functions, each of which can be readily solved. Mean-squared-error performance of the proposed estimator is evaluated for IEEE 802.11n wireless local area network applications.

In this paper, the bit error rate performances of multi-input multi-output orthogonal frequency division multiplexing transmission schemes for two and four transmit antennas are studied and compared in the presence of phase noise, I/Q imbalance and channel estimation errors. It is shown that for matched rates and same decoding complexity, maximum diversity schemes such as the Alamouti code, perform better than the maximum capacity schemes such as spatial multiplexing. The simulation environment comply with IEEE 802.11n standard.

The maximum likelihood estimate of the impulse response of a frequency-selective channel in the presence of phase noise and I/Q imbalance is derived. The complexity of the joint estimator is reduced using approximate cost functions for both phase noise and I/Q imbalance. The proposed estimator is first applied to OFDM transmission in a single-input single-output system and then generalized to multi-input multi-output OFDM systems. The bit error rate performance of popular space-time codes for two and four transmit antennas is evaluated under zero-forcing, minimum mean squared error and maximum likelihood detection rules. An expression for the residual inter-carrier interference variance after phase noise and I/Q imbalance compensation is derived and compared to the uncompensated case. Significant improvement in signal-to-interference-noise is obtained with the proposed algorithm.

A new method for detecting packet-based OFDM signals in the presence of phase noise is presented. The scattered pilots in each data OFDM symbol are used to non-iteratively estimate and mitigate the phase noise induced inter-carrier interference (ICI). A significant improvement in the bit error rate (BER) is achieved using this technique, especially for systems suffering from high phase noise.

In this paper, we derive the maximum likelihood (ML) channel estimate in the presence of phase noise (PHN) and I/Q imbalance for OFDM systems. Since it is estimated jointly with I/Q and PHN, the channel estimate is more robust to these RF impairments compared to the conventional schemes. The complexity of the joint estimator is reduced using an approximate cost functions for both PHN and I/Q imbalance. The performance of the proposed estimator in terms of both channel mean squared error (MSE) and bit error rate (BER) is also presented and compared to the case of perfect channel knowledge.

In addition to channel distortion and additive noise, hardware impairment at receivers is an important problem in modern communication system design. An effective receiver needs to compensate for the distortion caused by the propagation channel and by the hardware impairment separately so that receiver still can work in a time varying environment as if there were no receiver impairment. Adaptive filter in cascade form is a good candidate but previous analysis shows its multiple solutions prevent it from separate compensation. Our analysis shows that the cascaded filter has a convex cost function if multiple propagation channels are available and the expectation can be taken over the channels. Simulation shows good convergence performance. The separate compensation capability of the cascaded filters enables effective compensation of receiver impairments.

A novel phase-noise (PHN) compensation method is proposed in this paper. The proposed approach uses the information provided by an additional signal path that is added with modest hardware overhead to better estimate the PHN. In this signal path, the oscillator output is self-downconverted to the baseband by mixing itself with a delayed and conjugated replica, so as to provide PHN information that is free from data modulation. A joint prediction and smoothing Wiener filter can then be employed to obtain the minimum mean-squared error estimate of the PHN. There are generally two types of PHN models commonly used in the literature: stationary PHN and Wiener PHN. Both types of PHN are considered in this paper. Adaptive schemes are also presented using the least-mean square algorithm and recursive least-square algorithm. Simulations of a 64-quadrature amplitude modulation receiver confirm the analysis results of the PHN estimation performance, and show that the proposed method can improve the receiver performance significantly over the conventional schemes.

To digitize the ultra-wideband (UWB) signal at its Nyquist rate, a frequency channelized receiver for UWB radio based on hybrid filter banks (HFB) is presented. Among the challenges of such receivers are the uncertainties of the analog analysis filters and the slow convergence speed. To overcome these problems, a channelized receiver operating at slightly above the critically sampling rate is presented. The proposed receiver, which is designed for use in transmitted reference (TR) systems, combines the synthesis filters and the matched filter so that the joint response of the analysis filter and the propagation channel can be estimated independently in each subband. When the input noise is colored or a narrowband interference (NBI) is present, the weighting in each subband can be adaptively adjusted so to approximate the noise whitening and matched filtering operation for near optimal detection. The adaptive performance of the proposed receiver is slightly better than an ideal full-band receiver when the input noise is white and significantly better when a NBI is present. The effect of the automatic gain controller (AGC) and the analog-to-digital converter (ADC) are also considered. The proposed receiver with 3-bit ADC seems sufficient to achieve performance comparable to an infinite bit channelized receiver even in the presence of large NBI

This paper describes a cyclic prefixed communication structure that is a generalization of both the orthogonal frequency-division multiplexing (OFDM) system and the cyclic prefixed single-carrier (CP-SC) system. By exploiting the fact that a circulant matrix (CM) is also a block circulant matrix (BCM), the proposed generalized cyclic prefixed (GCP) communication system provides an additional degree of freedom that allows trade-offs among peak-to-average power ratio (PAR), bit allocation capability, and frequency diversity. Instead of one large IDFT operation as in the OFDM transmitter, GCP time interleaves multiple smaller sized IDFT operations, so that PAR is correspondingly reduced. By appropriately selecting the block size in the BCM, the PAR value and the number of subcarriers for bit allocation can be chosen regardless of the length of the transmission block. When the block size in BCM is selected to be one or the entire size of the transmission block, the proposed GCP becomes OFDM or CPSC, respectively.

The frequency channelized receiver based on hybrid filter bank is a promising receiver structure for ultra-wideband (UWB) radio because of its relaxed circuit requirements and robustness to narrowband interference. Maximally decimated channelizer requires the fewest number of ADCs, but it suffers from poor convergence speed, making it ill-suited for UWB systems. By applying cyclic prefix (CP) to the transmitted data, the channelizer and the propagation channel can be decomposed as a cascade of three fixed DFT related matrices and two diagonal matrices. This decomposition allows the rapidly varying propagation channel and the slowly varying channelizer to be updated at vastly different rates. An adaptive algorithm bused on minimizing the data block mean squared error (MSE) of the cascaded equalizers is also proposed. The performance is comparable to an ideal full band receiver alter initial convergence.

A novel phase noise (PHN) compensation scheme for communication transmitters is proposed. The proposed scheme downconverts the transmitted passband signal and oscillator output to the baseband by multiplying themselves with delayed and conjugated replicas. The baseband information provided by the additional signal paths helps to estimate the oscillator PHN. In the literature, there are two commonly used PHN models: Wiener PHN and stationary PHN. The proposed scheme compensates both types of PHN effectively. Simulation results show that the proposed scheme can significantly reduce the PHN.

This paper analyzes the effects of circuit nonlinearities and mismatches on the performance of an AC-coupled direct-conversion receiver (DCR). An analytical solution is necessary, since quantifying the DCR performance by simulation can be prohibitively slow. Our analysis approach first transforms the receiver front end to an equivalent baseband continuous-time receiver model with all of the noise sources referred to just before the sampler. Accurate approximations were made throughout this process to make the analysis tractable. The baseband continuous-time model can be further simplified and combined with the baseband equivalent propagation channel model. The resulting model allows the end-to-end performance of an ac-coupled DCR to be quickly and accurately quantified.

The phase noise (PHN) is one of the primary factors that limits the achievable performance in many communication systems. Recently, the authors have proposed an effective "2-paths" PHN compensation scheme (L. Zhao et al, Globecom 2003). The approach uses the information provided by an additional signal path added to the receiver front-end to better estimate the PHN. There are generally two types of PHN found in the literature: stationary PHN and Wiener PHN. Previous results have shown the effectiveness of the "2-paths" scheme for stationary PHN. This paper addresses the applicability of the "2-paths" scheme for combating Wiener PHN. It shows that simple modifications of the "2-paths" approach work effectively for Wiener PHN as well. PHN estimation error and signal-to-noise ratio (SNR) after PHN compensation are analyzed. Simulation results for a 64-QAM system demonstrate the significant improvement over conventional approaches in the presence of Wiener PHN.

The phase noise (PHN) of the local oscillator affects the overall receiver performance, especially when a noisier oscillator is chosen to lower the receiver cost. A novel PHN compensation method is proposed. It uses the information provided by an additional signal path that is added with small hardware overhead to estimate the PHN better. A Wiener smoothing filter can then be employed to obtain the minimum mean-squared error (MMSE) estimate of the PHN. Adaptive schemes are also presented using the least-mean-square (LMS) algorithm and recursive-least-square (RLS) algorithm. Simulations of a 64-QAM receiver show that the proposed method can improve the receiver performance significantly.

Critical to the design of a digital impulse radio (IR) receiver is the ability of the analog-to-digital converter (ADC) to efficiently sample and digitize the received signal at the signal Nyquist rate of several gigahertz. Since designing a single ADC to operate at such frequencies is not practical, channelized receivers that efficiently sample at a fraction of the signal Nyquist rate are presented. The performance are compared in the presence of phase noise/sampling jitter and narrowband interference. Our analysis suggests that channelizing the received signal in the frequency domain results in consistently higher performance than channelizing in the time domain. Furthermore, in the presence of moderate sampling jitter/phase noise, high resolution ADC's are not needed.

A channelized digital ultrawideband (UWB) receiver that efficiently samples the UWB signal at a fraction of the chip frequency is proposed. The received signal is channelized in the frequency domain by employing a bank of mixers and low-pass filters. After sampling at a much reduced frequency, digital synthesis filters optimally estimate the transmitted signals. The signal-to-noise ratio (SNR) of the proposed receiver has been solved and compared against an ideal conventional receiver, which is defined as a receiver that samples at the signal Nyquist rate. When finite resolution analog-to-digital converters (ADC) are employed in the presence of a large narrowband interferer, the proposed receiver significantly outperforms the ideal conventional receiver. For example, the SNR of the proposed receiver is as much as 20 dB higher than the ideal conventional receiver when a 4-bit ADC is used in the presence of a 50 dB (relative to the noise floor) brickwall narrowband interferer with a bandwidth of 15% of the chip frequency.

The direct-conversion radio-frequency receiver architecture promises superior performances in power, size, and cost over existing superheterodyne-based receivers. The use of direct-conversion receiver (DCR) architecture, however, has been limited due to two well-known problems, namely, the 1/f noise and the direct-current offset noise, to which conventional architectures are less sensitive. This paper analyzes these noise effects on reception performance of a DCR with alternating-current (ac) coupling filter in the receive path. A mathematical treatment of the performance of a DCR is provided. A performance bound of a DCR given its 1/f noise roll-off frequency and ac-coupling filter cut-off frequency is first obtained using vector coding. Then, the performance of a more practical adaptive reception method using a linear equalizer is discussed. Adaptability is especially important in rapidly time-varying channels such as in the wireless environment. The linear equalizer is effective at signal-to-noise ratios (SNRs) below 9 dB, but its performance degrades significantly at larger SNR. To achieve high performance at large SNR (>9 dB), a spectrum shaping method using line codes for direct-conversion reception is proposed. This method achieves near-optimum direct-conversion reception at high SNR while maintaining low complexity and adaptability at the receiver.

Although originally designed for the military, the Global Positioning System (GPS) has proven invaluable in a wide variety of civilian applications. This paper describes the design of a portable GPS receiver for use in numerous emerging applications such as cellular phones that integrate GPS to comply with the FCC's enhanced 911 mandate, personal locator systems for the elderly and children, and personal navigation systems. The focus of the GPS receiver design is on achieving low-power consumption and high level of integration, which are important design goals in a portable system.

Parallel correlation in direct-sequence spread spectrum system allows faster and more reliable coarse acquisition. However, the power consumed becomes significant especially for receivers that employ a large number of parallel correlators. In this paper, the power efficiency of various parallel correlator architectures is explored assuming baseband sampled signals of two samples per chip. Active correlators placed in parallel that use both two's complement and sign-magnitude accumulators are first presented. A functionally equivalent M-parallel passive correlators are then studied. In this approach, the baseband sampled signals are passed through a tapped delay-line. Each tap is then multiplied by a stationary reference pseudonoise code and summed using a binary tree network. The passive correlators are generally more power efficient compared to both types of active correlators, especially for large M values. Further reduction in power consumption is possible by splitting the tapped delay-line into even and odd delays and summing using two smaller binary tree adders. This proposed architecture consumes significantly less power compared to all other architectures. The power dissipation of M-parallel correlator architectures are evaluated for M = 8, 16, 32 using TSMC 0.35-µm CMOS technology at 3.3V supply voltage.

This paper presents a low-power, low-complexity video encoder/decoder algorithm and architecture for portable video-conferencing applications. We encode each frame using wavelet decomposition followed by tree-structured vector quantization (TSVQ) of crossband vectors, achieving a compression ratio of 16:1 spatially. The temporal correlation between frames is exploited using conditional replenishment. For video commonly used in conferencing applications, conditional replenishment achieves a compression ratio of 4:1 temporally. Thus, the data rate for YUV (4:1:1) compressed video (176/spl times/144/spl times/30 fps) is 150 kbps on average with a PSNR of approximately 33 dB. The proposed scheme has an architectural simplicity, allowing the encoder and decoder to be performed on two separate chips. The power dissipated is estimated to be 7.2 mW for the encoder and 1.0 mW for the decoder in a 0.8 micron CMOS technology at 1.5 V.