VLDB 2026 Research / reviewers in the wild / expert
Steven M. Girvin
dblp:180/1658
· DBLP profile ↗
2ranked-venue papers
0as first author
2since 2021 · last 2024
0000-0002-6470-5494ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Theory of computation · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Emerging computing paradigms · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Emerging computing paradigms
quantum computer architecture |
0.7 | 1 | 2023 | Systems Architecture for Quantum Random Access Memory · MICRO 2023 |
Emerging computing paradigms › quantum computing
quantum memory |
0.7 | 1 | 2023 | Systems Architecture for Quantum Random Access Memory · MICRO 2023 |
Emerging computing paradigms › quantum computer architecture
quantum random access memory |
0.7 | 1 | 2023 | Systems Architecture for Quantum Random Access Memory · MICRO 2023 |
Methods — techniques the papers use, named apart from their topics
QRAM architecture design · 0.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | ARQUIN: Architectures for Multinode Superconducting Quantum ComputersabstractMany proposals to scale quantum technology rely on modular or distributed designs wherein individual quantum processors, called nodes, are linked together to form one large multinode quantum computer (MNQC). One scalable method to construct an MNQC is using superconducting quantum systems with optical interconnects. However, internode gates in these systems may be two to three orders of magnitude noisier and slower than local operations. Surmounting the limitations of internode gates will require improvements in entanglement generation, use of entanglement distillation, and optimized software and compilers. Still, it remains unclear what performance is possible with current hardware and what performance algorithms require. In this article, we employ a systems analysis approach to quantify overall MNQC performance in terms of hardware models of internode links, entanglement distillation, and local architecture. We show how to navigate tradeoffs in entanglement generation and distillation in the context of algorithm performance, lay out how compilers and software should balance between local and internode gates, and discuss when noisy quantum internode links have an advantage over purely classical links. We find that a factor of 10–100× better link performance is required and introduce a research roadmap for the co-design of hardware and software towards the realization of early MNQCs. While we focus on superconducting devices with optical interconnects, our approach is general across MNQC implementations. James Ang 0001, Gabriella Carini, Yanzhu Chen, Isaac L. Chuang, Michael DeMarco, Sophia E. Economou, Alec Eickbusch, Andrei Faraon, Kai-Mei Fu, Steven M. Girvin, Michael Hatridge, Andrew A. Houck, Paul Hilaire, Kevin Krsulich, Ang Li 0006, Yuan Liu 0023, Margaret Martonosi, David C. McKay, Jim Misewich, Mark B. Ritter, Robert J. Schoelkopf, Samuel A. Stein, Sara Sussman, Teague Tomesh, Norm M. Tubman, Nathan Wiebe, Yongxin Yao, Dillon Yost, Yiyu Zhou |
ACM Trans. Quantum Comput. | 10 |
| 2023 | Systems Architecture for Quantum Random Access MemoryabstractOperating on the principles of quantum mechanics, quantum algorithms hold the promise for solving problems that are beyond the reach of the best-available classical algorithms. An integral part of realizing such speedup is the implementation of quantum queries, which read data into forms that quantum computers can process. Quantum random access memory (QRAM) is a promising architecture for realizing quantum queries. However, implementing QRAM in practice poses significant challenges, including query latency, memory capacity and fault-tolerance. Shifan Xu, Connor T. Hann, Ben Foxman, Steven M. Girvin, Yongshan Ding 0001 |
MICRO | 4 |