Eric George Manning

dblp:180/3397 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 1966
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 72% Hardware reliability and fault tolerance · 22% Processor architecture and microarchitecture · 6%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
fault diagnosis
0.021966
On Computer Self-Diagnosis Part II-Generalizations and Design Principles · IEEE Trans. Electron. Comput. 1966
On Computer Self-Diagnosis Part I-Experimental Study of a Processor · IEEE Trans. Electron. Comput. 1966
Electronic design automation › hardware verification and test › fault diagnosis
diagnosable systems
0.011966
On Computer Self-Diagnosis Part II-Generalizations and Design Principles · IEEE Trans. Electron. Comput. 1966
Hardware reliability and fault tolerance
fault-tolerant design
0.011966
On Computer Self-Diagnosis Part II-Generalizations and Design Principles · IEEE Trans. Electron. Comput. 1966
Electronic design automation › hardware verification and test › VLSI testing
microprocessor testing
0.011966
On Computer Self-Diagnosis Part I-Experimental Study of a Processor · IEEE Trans. Electron. Comput. 1966

Methods — techniques the papers use, named apart from their topics

fault injection · 0.0
YearPublicationVenuePosition
1966 On Computer Self-Diagnosis Part I-Experimental Study of a Processor
abstract
The problem considered is the derivation of self-diagnosis procedures for digital computers. A self-diagnosis procedure is defined as an experiment of two outcomes: 1) all transistor-diode logic is failure-free; or 2) card or module X has a fault of type Y. Also, the procedure must be sufficiently fast to permit execution every few hours by nontechnical personnel. A method for the production of self-diagnosis procedures is given. The method was experimentally applied to the problem of self-diagnosis of the central processor of an existing computer. Work was carried far enough to verify validity, and to obtain estimates of certain parameters. These were used in turn to develop an estimate of total length for the complete procedure, which indicated that execution time would be acceptably short. The experimental results will also be used in a companion paper to develop more extensive estimates.
Eric George Manning
IEEE Trans. Electron. Comput.1
1966 On Computer Self-Diagnosis Part II-Generalizations and Design Principles
abstract
A general method for the production of self-diagnosis procedures for digital computers is given. A number of principles which facilitate the design of diagnosable machines are proposed. The most general recommendations are that the machine be asynchronous, free of redundant components, and that production of the diagnosis procedure be undertaken concurrently with design of the system. On the level of circuit design, it is recommended that sequential circuits be strongly connected, totally sequential, and of short transient length. System design principles given include the following recommendations. The design should be functionally well-modularized and free of pulse-mode circuitry. Each module of the design should cause a hangup whenever it receives an illegal control sequence from any other module. The design should be minimal in global (intermodular) feedback lines, and the global lines should not undergo transitions until all local (intramodular) lines have settled. All of the above material was motivated by the results of an experimental study reported in a previous paper. A somewhat new type of machine organization suited to the given production method and design principles is proposed (cascade organization). A feasibility study of self-diagnosis of a cascade-organized processor of moderate size is described. The results indicate that self-diagnosis of such a system is feasible although treatment of medium-and large-sized machines will require improved simulation procedures. Finally, several suggestions for further work are made.
Eric George Manning
IEEE Trans. Electron. Comput.1