This work presents an algorithm hardware co-design implementing a digital neuronal population dynamics simulator intended for the trajectory error correction task within a simultaneous localization and mapping workflow. A custom discretized procedural algorithm approximating a neuronal population dynamics-based inference operation is developed for mapping onto an ultra-lightweight digital macro featuring massively parallel in-situ processing techniques. Fabricated using a 40nm technology, the test chip features a$22\times 22$neuron array with 0.1358mm2 core area and provides a 12-bit computing precision. A time-multiplexed processing element design prevents the use of excessive silicon area. Accomplished via extensive data reuse through massively parallel processing-in-memory architecture attached to a custom I/O interface, a single inference operation is completed within 3277 clock cycles, providing 200 inferences per second operating at a low frequency of 0.667Mhz with a 0.5V core supply and consuming sub-10-$\mu $W power.

This paper presents a MEMS-based wake-up receiver (WuRX) operating at 825 MHz, with low-power and high-sensitivity. To enhance selectivity and interference rejection, a high-Q MEMS resonator is incorporated, co-designed with the low noise amplifier (LNA) to implement resonant noise matching (RNM), providing passive gain to mitigate the input-referred noise. The receiver is implemented in TSMC 65nm CMOS technology, achieving a sensitivity of −70 dBm at 10-3BER while consuming a mere 2.83 µW of power at a 1 V power supply. Additionally, it attains a SIR of 20 dB at a 2 MHz offset from the center frequency.

This work presents an algorithm hardware co-design implementing a digital neuronal population dynamics simulator intended for a component within the back-end of simultaneous localization and mapping. A custom discretized procedural algorithm including injection, finite difference update, activation, and inhibition to approximate neuronal population dynamics is developed for digital implementation. Fabricated using a 40nm technology, the test chip features a scalable neuron 22 × 22 array with 0.1358mm2core area and provides a 12-bit computing precision. A time-multiplexed processing element design prevents the use of excessive silicon area. Accomplished via extensive data reuse through massively parallel processing-in-memory architecture attached to a custom I/O interface, a single inference operation is completed within 3277 clock cycles, providing 200 inferences per second operating at a low frequency of 0.667Mhz with a 0.5V core supply and consuming 2.793µW of power.

A novel mixed-signal adaptable silicon-based coherent photoacoustic (PA) sensing system-on-chip (SoC) is proposed to detect various kinds of target signals robustly under high noise and strong interferences in compact chip-level, attaining precise in vivo sensing for physiological signs monitoring and enhanced bio-imaging. Based on the configurable coherent PA sensing SoC architecture supported by on-chip Gilbert cell-based multiplier, a digital processing module, and DACs, in-phase (I) and quadrature (Q) templates generated by digital module on-chip are configurable to be with a high correlation coefficient to the target PA signal, attaining detection and reconstruction of target signals in a coherent detection mode. The correlation between the received PA signal and the templates is implemented efficiently, assuring accurate tracking and precise reconstruction on the target PA signals at the chip level. Based on the integrated PA SoC fabricated by the TSMC 65-nm CMOS process, precise in vivo sensing and imaging can be assured at the edge. Further, as PA detection leverages optical and ultrasound sensing, in vivo imaging on in-depth vessels or other tissues can be attained. The mixed-signal PA SoC paves the way for sustainable health monitoring and owns immense potential for early disease diagnostics based on in vivo blood temperature sensing and vessel imaging.

An ultra-lower power (ULP) MEMS-based FSK transmitter is implemented in 65 nm CMOS. The transmitter operates in ISM-915 MHz band using a binary FSK modulator employing the high-Q dual microelectromechanical system (MEMS) resonators. The transmitter using an adaptive fast switching binary FSK modulator generates FSK signals in 915 MHz band with -8.2 dBm output power, supporting up to 10 Mb/s data rate. The phase noise (PN) of the FSK modulator was measured for each of the two different operation frequencies, achieving -139.4dBc/Hz and -138.7dBc/Hz at a 1-MHz offset at 911.9 MHz and 923.1 MHz, respectively. At 10 Mb/s, the transmitter consumes 753 pW, which translates to energy-efficiency of 75.3 pJ/b.

To minimize the area of analog-to-digital converters (ADCs) for multichannel applications and break the SNDR limitation caused by DAC-induced nonlinearity, a more area-efficient mismatch error shaping (MES) scheme is proposed in noise shaping (NS) successive-approximation (SAR) ADC. By employing a switched-capacitor (SC) voltage divider, the proposed method makes the flash ADC and data weighted averaging (DWA) digital circuits in the original MES method obsolete. Therefore, the complexity of the architecture is highly reduced, and the area is significantly reduced to 0.037 mm2. In addition, the power consumption for the MES implementation is significantly decreased by more than 7.3%. The proposed SAR ADC is fabricated in GF 40-nm CMOS technology. The measurements show that the proposed MES technique improves the SFDR from 64 to 102 dB and decreases the THD from -63.6 to -95.7 dB. The SNR and SNDR in a 20-kHz bandwidth are 91.6 and 90.2 dB, respectively. The power consumption is 383.4 μW with a 1.1-V power supply at a 16-MS/s sampling rate.

For wearable biomedical devices, it is essential to detect target signals under high noise and strong interferences. Moreover, it is critical to realize the system with compact size and easy implementation. To address both goals, this paper presents a chip-based photoacoustic (PA) sensor called QuACL. By leveraging the adaptive coherent lock-in technique, the high sensitivity and specificity can be achieved for detecting target signals. In-phase and quadrature PA templates are specifically designed based on the profile of the target signal and are generated by the FPGA board and the DAC board. The received signal is correlated with the templates to capture, track, and recover the target PA signal. Fabricated in 65-nm CMOS technology, the chip-based sensor system occupies only 0.6 mm2area. The robustness and versatility of the QuACL sensor system are verified by the experiments on discerning and recovering weak PA signals accurately.

High current, small area, and superior transient response LDO is gaining increasing attention for the battery-powered 5G mobile application. This paper presents an NMOS LDO realized in 0.13μm CMOS process featuring a 10mV undershoot and overshoot with 1A/100ns load current. The superior transient performance is achieved by a new multi-loop feedback scheme. The presented LDO also embodies a new frequency compensation scheme, which enables a stable 60dB dc loop gain despite 1A load current variation. This contributes to a small load regulation and line regulation of 0.6μV/A and 0.23mV/V, respectively. The LDO consumes 35μA quiescent current in mission mode. The silicon size of the LDO is 325μm × 106μm.

Flexible and wearable devices are emerging with the developing of the sensors and IoT (internet of the things). The power consumption and volume of such devices are dominant limitations for wearable feature in various applications. To meet the requirements, a photoacoustic receiver system-on-chip (SoC) is developed and fabricated with a novel correlation detection technique based on the early-and-late tracking. Through this method, output SNR of the receiver can be significantly improved. For this, a low power and high sensitivity analog front-end (AFE) with a noise shaping (NS) SAR ADC is implemented. As oversampling is necessary for the accurate delay of digital processing, noise shaping technique is implemented in the SAR ADC. Simulation results show that, the AFE achieves 70 dB dynamic range and 20 μV sensitivity for about 30 dB output SNR. The SAR ADC can obtain 71 dB SNDR under 50MSps sampling rate with the aid of the NS technique. Based on the analog circuits design, the digital part for the detecting technique is also implemented on chip. The whole power consumption is about 15 mW on the TSMC 65 nm CMOS process.

Diabetes mellitus is a prevalent metabolic disease which requires daily glucose monitoring for patients. Commercially available devices are all finger-prick which is painful and costly. Herein, we developed a portable and noninvasive glucose sensor based on photoacoustic (PA) technique. The size of the sensor main body is 17cm(L) × 14cm(W) × 10cm(H) with a weight of 650g (including a power bank). The system configuration is shown and the performance was evaluated by in vitro experiment on aqueous glucose solution at both high (1~8g/dL) and low concentrations (50~350 mg/dL). The R2and RMSE values achieved are 0.9526, 0.5903g/dL and 0.8966, 40.18mg/dL, respectively. Moreover, Clarke Error Grid analysis is also applied for physiological concentration prediction evaluation and 71.43% of data points fall in region A and the remaining points are in B, indicating the potential of our portable PA glucose sensor for clinical application.

Integrated frequency modulated continuous wave (FMCW) radar on chip (RoC) shows huge potential on real-time, versatile, wireless monitoring of human health conditions with low power, high sensitivity and compact size. This paper presents a Ku-band FMCW RoC working at 15 GHz center frequency, which can realize accurate continuous health monitoring based on interferometry phase analysis algorithm. A digital-tunable mixed-signal-mode FMCW chirp synthesizer is designed to ensure the phase accuracy with high power efficiency. A saturated driver-amplifier and power-amplifier chain is used to suppress the chirp ripples, thus ensuring the accurate phase measurement. Fabricated in 65 nm CMOS technology, the prototype demonstrates 1 GHz chirp bandwidth with 1.2 V supply and 238 mW power consumption, which satisfies the low-power requirement for continuous-time healthcare monitoring applications. Experiments on detecting various kinds of micro physiological signals are carried out using the FMCW radar chip prototype based on the phase analysis algorithm. The radar and the phase analysis algorithm can be further integrated into an ASIC to realize higher performance on healthcare monitoring.