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Hideki Egami

dblp:181/3127 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1989
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 1Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware accelerators and domain-specific architectures · 62% Integrated circuit design · 19% Processor architecture and microarchitecture · 19%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware accelerators and domain-specific architectures › robotics accelerator
inverse kinematics accelerator
0.011989
Implementation of a high performance LSI for inverse kinematics computation · ICRA 1989
Integrated circuit design
digital circuit design
0.011989
Implementation of a high performance LSI for inverse kinematics computation · ICRA 1989
Processor architecture and microarchitecture
pipelining
0.011989
Implementation of a high performance LSI for inverse kinematics computation · ICRA 1989

Methods — techniques the papers use, named apart from their topics

CORDIC algorithm · 0.0
YearPublicationVenuePosition
1989 Implementation of a high performance LSI for inverse kinematics computation
abstract
The authors present an LSI (large-scale integrated) circuit for high-speed inverse kinematics computation. They demonstrate that inverse kinematic solutions can be described by two-dimensional vector rotations and arc tangent operations and that these operations can be efficiently computed by the coordinate rotation digital computer (CORDIC) algorithms. The chip is fabricated using 1.5- mu m CMOS gate array technology, and the design of the arithmetic unit on the chip is based on the CORDIC algorithms. Pipelining is fully used in the processor to enhance the operating ration up to 100%. The resulting compact inverse kinematics processor is composed of the above chip and a few memory chips for program and data. The processor can be used for various kinds of manipulators.>
Michitaka Kameyama, Takao Matsumoto, Hideki Egami, Tatsuo Higuchi 0001
ICRA3