VLDB 2026 Research / reviewers in the wild / expert
Andrea Lattuada 0001
dblp:181/5922
· DBLP profile ↗
13ranked-venue papers
2as first author
9since 2021 · last 2025
0000-0002-9303-452XORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 9 · 2 first-author · 8 since 2021Databases, data management, data science and information retrieval · 2Computer networks · 1Theory of computation · 1 · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Unlocking True Elasticity for the Cloud-Native Era with DandelionabstractElasticity is fundamental to cloud computing. An elastic platform can quickly allocate resources to match the demand of each workload as it arrives, rather than pre-provisioning resources to meet performance objectives. However, even serverless platforms — which boot sandboxes in 10s to 100s of milliseconds — are not sufficiently elastic to avoid pre-provisioning expensive resources. Today's FaaS platforms provision many extra, idle sandboxes in memory to reduce the occurrence of slow, cold starts. Initializing securely isolated sandboxes with a POSIX-like computing environment that today's cloud users expect is slow as it requires booting a guest OS and configuring networking. Tom Kuchler, Pinghe Li, Yazhuo Zhang, Lazar Cvetkovich, Boris Goranov, Tobias Stocker, Leon Thomm, Simone Kalbermatter, Tim Notter, Andrea Lattuada 0001, Ana Klimovic |
SOSP | 10 |
| 2025 | Destabilizing IrisabstractThe separation logic framework Iris has been built on the premise that all assertions are stable , meaning they unconditionally enjoy the famous frame rule. This gives Iris—and the numerous program logics that build on it—very modular reasoning principles. But stability also comes at a cost. It excludes a core feature of the Viper verifier family, heap-dependent expression assertions , which lift program expressions to the assertion level in order to reduce redundancy between code and specifications and better facilitate SMT-based automation. In this paper, we bring heap-dependent expression assertions to Iris with Daenerys . To do so, we must first revisit the very core of Iris, extending it with a new form of unstable resources (and adapting the frame rule accordingly). On top, we then build a program logic with heap-dependent expression assertions and lay the foundations for connecting Iris to SMT solvers. We apply Daenerys to several case studies, including some that go beyond what Viper and Iris can do individually and others that benefit from the connection to SMT. Simon Spies, Niklas Mück, Haoyi Zeng, Michael Sammler, Andrea Lattuada 0001, Peter Müller 0001, Derek Dreyer |
Proc. ACM Program. Lang. | 5 |
| 2024 | Anvil: Verifying Liveness of Cluster Management Controllers
Xudong Sun 0013, Jiawei Tyler Gu, Zicheng Ma, Tej Chajed, Jon Howell, Andrea Lattuada 0001, Oded Padon, Lalith Suresh 0001, Adriana Szekeres, Tianyin Xu |
OSDI | 7 |
| 2024 | Verus: A Practical Foundation for Systems VerificationabstractFormal verification is a promising approach to eliminate bugs at compile time, before they ship. Indeed, our community has verified a wide variety of system software. However, much of this success has required heroic developer effort, relied on bespoke logics for individual domains, or sacrificed expressiveness for powerful proof automation. Andrea Lattuada 0001, Travis Hance, Jay Bosamiya, Matthias Brun 0002, Chanhee Cho, Hayley LeBlanc, Pranav Srinivasan, Reto Achermann, Tej Chajed, Chris Hawblitzel, Jon Howell, Jacob R. Lorch, Oded Padon, Bryan Parno |
SOSP | 1 |
| 2023 | Beyond isolation: OS verification as a foundation for correct applicationsabstractVerified systems software has generally had to assume the correctness of the operating system and its provided services (like networking and the file system). Even though there exist verified operating systems and file systems, the specifications for these components do not compose with applications to produce a fully verified high-performance software stack. Matthias Brun 0002, Reto Achermann, Tej Chajed, Jon Howell, Gerd Zellweger, Andrea Lattuada 0001 |
HotOS | 6 |
| 2023 | Sharding the State Machine: Automated Modular Reasoning for Complex Concurrent Systems
Travis Hance, Yi Zhou 0025, Andrea Lattuada 0001, Reto Achermann, Alexander Conway 0001, Ryan Stutsman, Gerd Zellweger, Chris Hawblitzel, Jon Howell, Bryan Parno |
OSDI | 3 |
| 2023 | Verus: Verifying Rust Programs using Linear Ghost TypesabstractThe Rust programming language provides a powerful type system that checks linearity and borrowing, allowing code to safely manipulate memory without garbage collection and making Rust ideal for developing low-level, high-assurance systems. For such systems, formal verification can be useful to prove functional correctness properties beyond type safety. This paper presents Verus, an SMT-based tool for formally verifying Rust programs. With Verus, programmers express proofs and specifications using the Rust language, allowing proofs to take advantage of Rust's linear types and borrow checking. We show how this allows proofs to manipulate linearly typed permissions that let Rust code safely manipulate memory, pointers, and concurrent resources. Verus organizes proofs and specifications using a novel mode system that distinguishes specifications, which are not checked for linearity and borrowing, from executable code and proofs, which are checked for linearity and borrowing. We formalize Verus' linearity, borrowing, and modes in a small lambda calculus, for which we prove type safety and termination of specifications and proofs. We demonstrate Verus on a series of examples, including pointer-manipulating code (an xor-based doubly linked list), code with interior mutability, and concurrent code. Andrea Lattuada 0001, Travis Hance, Chanhee Cho, Matthias Brun 0002, Isitha Subasinghe, Yi Zhou 0025, Jon Howell, Bryan Parno, Chris Hawblitzel |
Proc. ACM Program. Lang. | 1 |
| 2022 | Linear types for large-scale systems verificationabstractReasoning about memory aliasing and mutation in software verification is a hard problem. This is especially true for systems using SMT-based automated theorem provers. Memory reasoning in SMT verification typically requires a nontrivial amount of manual effort to specify heap invariants, as well as extensive alias reasoning from the SMT solver. In this paper, we present a hybrid approach that combines linear types with SMT-based verification for memory reasoning. We integrate linear types into Dafny, a verification language with an SMT backend, and show that the two approaches complement each other. By separating memory reasoning from verification conditions, linear types reduce the SMT solving time. At the same time, the expressiveness of SMT queries extends the flexibility of the linear type system. In particular, it allows our linear type system to easily and correctly mix linear and nonlinear data in novel ways, encapsulating linear data inside nonlinear data and vice-versa. We formalize the core of our extensions, prove soundness, and provide algorithms for linear type checking. We evaluate our approach by converting the implementation of a verified storage system (about 24K lines of code and proof) written in Dafny, to use our extended Dafny. The resulting system uses linear types for 91% of the code and SMT-based heap reasoning for the remaining 9%. We show that the converted system has 28% fewer lines of proofs and 30% shorter verification time overall. We discuss the development overhead in the original system due to SMT-based heap reasoning and highlight the improved developer experience when using linear types. Jialin Li 0001, Andrea Lattuada 0001, Yi Zhou 0025, Jonathan Cameron, Jon Howell, Bryan Parno, Chris Hawblitzel |
Proc. ACM Program. Lang. | 2 |
| 2021 | Verified Progress Tracking for Timely DataflowabstractLarge-scale stream processing systems often follow the dataflow paradigm, which enforces a program structure that exposes a high degree of parallelism. The Timely Dataflow distributed system supports expressive cyclic dataflows for which it offers low-latency data- and pipeline-parallel stream processing. To achieve high expressiveness and performance, Timely Dataflow uses an intricate distributed protocol for tracking the computation’s progress. We modeled the progress tracking protocol as a combination of two independent transition systems in the Isabelle/HOL proof assistant. We specified and verified the safety of the two components and of the combined protocol. To this end, we identified abstract assumptions on dataflow programs that are sufficient for safety and were not previously formalized. Matthias Brun 0002, Sára Decova, Andrea Lattuada 0001, Dmitriy Traytel |
ITP | 3 |
| 2020 | Storage Systems are Distributed Systems (So Verify Them That Way!)
Travis Hance, Andrea Lattuada 0001, Chris Hawblitzel, Jon Howell, Rob Johnson 0001, Bryan Parno |
OSDI | 2 |
| 2020 | Shared Arrangements: practical inter-query sharing for streaming dataflowsabstractCurrent systems for data-parallel, incremental processing and view maintenance over high-rate streams isolate the execution of independent queries. This creates unwanted redundancy and overhead in the presence of concurrent incrementally maintained queries: each query must independently maintain the same indexed state over the same input streams, and new queries must build this state from scratch before they can begin to emit their first results. This paper introduces shared arrangements : indexed views of maintained state that allow concurrent queries to reuse the same in-memory state without compromising data-parallel performance and scaling. We implement shared arrangements in a modern stream processor and show order-of-magnitude improvements in query response time and resource consumption for incremental, interactive queries against high-throughput streams, while also significantly improving performance in other domains including business analytics, graph processing, and program analysis. Frank McSherry, Andrea Lattuada 0001, Malte Schwarzkopf, Timothy Roscoe |
Proc. VLDB Endow. | 2 |
| 2019 | Megaphone: Latency-conscious state migration for distributed streaming dataflowsabstractWe design and implement Megaphone, a data migration mechanism for stateful distributed dataflow engines with latency objectives. When compared to existing migration mechanisms, Megaphone has the following differentiating characteristics: (i) migrations can be subdivided to a configurable granularity to avoid latency spikes, and (ii) migrations can be prepared ahead of time to avoid runtime coordination. Megaphone is implemented as a library on an unmodified timely dataflow implementation, and provides an operator interface compatible with its existing APIs. We evaluate Megaphone on established benchmarks with varying amounts of state and observe that compared to naïve approaches Megaphone reduces service latencies during reconfiguration by orders of magnitude without significantly increasing steady-state overhead. Moritz Hoffmann 0001, Andrea Lattuada 0001, Frank McSherry, Vasiliki Kalavri, John Liagouris, Timothy Roscoe |
Proc. VLDB Endow. | 2 |
| 2018 | SnailTrail: Generalizing Critical Paths for Online Analysis of Distributed Dataflows
Moritz Hoffmann 0001, Andrea Lattuada 0001, John Liagouris, Vasiliki Kalavri, Desislava C. Dimitrova, Sebastian Wicki, Zaheer Chothia, Timothy Roscoe |
NSDI | 2 |