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Mohammad A. Noureddine

dblp:184/3896 · DBLP profile ↗
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8ranked-venue papers
3as first author
1since 2021 · last 2021
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 7 · 2 first-author · 1 since 2021Software engineering, systems software and programming languages · 3 · 2 first-authorSystems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
2 papers
Systems and software security · 38% Network security · 38% Digital forensics and information hiding · 24%
Software engineering, system software, and programming languages
1 paper
Program verification · 100%
Theoretical computer science
1 paper
Automated reasoning and model checking · 100%

Topics — the 7 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Network security › intrusion detection and prevention
intrusion detection
0.922021
Validating the Integrity of Audit Logs Against Execution Repartitioning Attacks · CCS 2021
OmegaLog: High-Fidelity Attack Investigation via Transparent Multi-layer Log Analysis · NDSS 2020
Digital forensics and information hiding
attack investigation
0.412020
OmegaLog: High-Fidelity Attack Investigation via Transparent Multi-layer Log Analysis · NDSS 2020
Systems and software security
log analysis
0.412020
OmegaLog: High-Fidelity Attack Investigation via Transparent Multi-layer Log Analysis · NDSS 2020
Program verification › model checking
bounded model checking
0.212016
Model Checking Software with First Order Logic Specifications Using AIG Solvers · IEEE Trans. Software Eng. 2016
Automated reasoning and model checking
satisfiability
0.212016
Model Checking Software with First Order Logic Specifications Using AIG Solvers · IEEE Trans. Software Eng. 2016
Digital forensics and information hiding › digital forensics
forensic analysis
0.112021
Validating the Integrity of Audit Logs Against Execution Repartitioning Attacks · CCS 2021
Electronic design automation › hardware verification and test
hardware verification
0.112016
Model Checking Software with First Order Logic Specifications Using AIG Solvers · IEEE Trans. Software Eng. 2016

Methods — techniques the papers use, named apart from their topics

SMT · 0.8SAT · 0.8provenance analysis · 0.5execution unit partitioning · 0.5and-inverter graph · 0.5and-inverter-graph · 0.2
YearPublicationVenuePosition
2021 Validating the Integrity of Audit Logs Against Execution Repartitioning Attacks
abstract
Provenance-based causal analysis of audit logs has proven to be an invaluable method of investigating system intrusions. However, it also suffers from dependency explosion, whereby long-running processes accumulate many dependencies that are hard to unravel. Execution unit partitioning addresses this by segmenting dependencies into units of work, such as isolating the events that processed a single HTTP request. Unfortunately, we discover that current designs have a semantic gap problem due to how system calls and application log messages are used to infer complex internal program states. We demonstrate how attackers can modify existing code exploits to control event partitioning, breaking links in the attack and framing innocent users. We also show how our techniques circumvent existing program and log integrity defenses.
Carter Yagemann, Mohammad A. Noureddine, Wajih Ul Hassan, Simon P. Chung, Adam Bates 0001, Wenke Lee
CCS2
2020 OmegaLog: High-Fidelity Attack Investigation via Transparent Multi-layer Log Analysis
Wajih Ul Hassan, Mohammad A. Noureddine, Pubali Datta, Adam Bates 0001
NDSS2
2019 Revisiting Client Puzzles for State Exhaustion Attacks Resilience
abstract
In this paper, we address the challenges facing the adoption of client puzzles as a means to protect the TCP connection establishment channel from state exhaustion DDoS attacks. We model the problem of selecting the puzzle difficulties as a Stackelberg game with the server as the leader and the clients as the followers and obtain the equilibrium solution for the puzzle difficulty. We then present an implementation of client puzzles inside the TCP stack of the Linux 4.13.0 kernel. We evaluate the performance of our implementation and the obtained solution against a range of attacks through reproducible experiments on the DETER testbed. Our results show that client puzzles are effective at boosting the tolerance of the TCP handshake channel to state exhaustion DDoS attacks by rate limiting malicious attackers while allocating resources for legitimate clients.
Mohammad A. Noureddine, Ahmed M. Fawaz, Amanda Hsu, Cody Guldner, Sameer Vijay, Tamer Basar, William H. Sanders
DSN1
2018 POWERALERT: Integrity Checking Using Power Measurement and a Game-Theoretic Strategy
abstract
We propose POWERALERT, an efficient external integrity checker for untrusted hosts. Current attestation systems suffer from shortcomings, including requiring a complete checksum of the code segment, from being static, use of timing information sourced from the untrusted machine, or using imprecise timing information such as network round-trip time. We address those shortcomings by (1) using power measurements from the host to ensure that the checking code is executed and (2) checking a subset of the kernel space over an extended period. We compare the power measurement against a learned power model of the execution of the machine and validate that the execution was not tampered. Finally, POWERALERT randomizes the integrity checking program to prevent the attacker from adapting. We model the interaction between POWERALERT and an attacker as a time-continuous game. The Nash equilibrium strategy of the game shows that POWERALERT has two optimal strategy choices: (1) aggressive checking that forces the attacker into hiding, or (2) slow checking that minimizes cost. We implement a prototype of POWERALERT using Raspberry Pi and evaluate the performance of the integrity checking program generation.
Ahmed M. Fawaz, Mohammad A. Noureddine, William H. Sanders
DSN2
2018 Determining Tolerable Attack Surfaces that Preserves Safety of Cyber-Physical Systems
abstract
As safety-critical systems become increasingly interconnected, a system's operations depend on the reliability and security of the computing components and the interconnections among them. Therefore, a growing body of research seeks to tie safety analysis to security analysis. Specifically, it is important to analyze system safety under different attacker models. In this paper, we develop generic parameterizable state automaton templates to model the effects of an attack. Then, given an attacker model, we generate a state automaton that represents the system operation under the threat of the attacker model. We use a railway signaling system as our case study and consider threats to the communication protocol and the commands issued to physical devices. Our results show that while less skilled attackers are not able to violate system safety, more dedicated and skilled attackers can affect system safety. We also consider several countermeasures and show how well they can deter attacks.
Carmen Cheh, Ahmed M. Fawaz, Mohammad A. Noureddine, Binbin Chen 0001, William G. Temple, William H. Sanders
PRDC3
2017 Accounting for the Human User in Predictive Security Models
abstract
Given the growing sophistication of cyber attacks, designing a perfectly secure system is not generally possible. Quantitative security metrics are thus needed to measure and compare the relative security of proposed security designs and policies. Since the investigation of security breaches has shown a strong impact of human errors, ignoring the human user in computing these metrics can lead to misleading results. Despite this, and although security researchers have long observed the impact of human behavior on system security, few improvements have been made in designing systems that are resilient to the uncertainties in how humans interact with a cyber system. In this work, we develop an approach for including models of user behavior, emanating from the fields of social sciences and psychology, in the modeling of systems intended to be secure. We then illustrate how one of these models, namely general deterrence theory, can be used to study the effectiveness of the password security requirements policy and the frequency of security audits in a typical organization. Finally, we discuss the many challenges that arise when adopting such a modeling approach, and then present our recommendations for future work.
Mohammad A. Noureddine, Andrew Marturano, Ken Keefe, Masooda N. Bashir, William H. Sanders
PRDC1
2017 An Unsupervised Multi-Detector Approach for Identifying Malicious Lateral Movement
abstract
Lateral movement-based attacks are increasingly leading to compromises in large private and government networks, often resulting in information exfiltration or service disruption. Such attacks are often slow and stealthy and usually evade existing security products. To enable effective detection of such attacks, we present a new approach based on graph-based modeling of the security state of the target system and correlation of diverse indicators of anomalous host behavior. We believe that irrespective of the specific attack vectors used, attackers typically establish a command and control channel to operate, and move in the target system to escalate their privileges and reach sensitive areas. Accordingly, we identify important features of command and control and lateral movement activities and extract them from internal and external communication traffic. Driven by the analysis of the features, we propose the use of multiple anomaly detection techniques to identify compromised hosts. These methods include Principal Component Analysis, k-means clustering, and Median Absolute Deviation-based outlier detection. We evaluate the accuracy of identifying compromised hosts by using injected attack traffic in a real enterprise network dataset, for various attack communication models. Our results show that the proposed approach can detect infected hosts with high accuracy and a low false positive rate.
Atul Bohara, Mohammad A. Noureddine, Ahmed M. Fawaz, William H. Sanders
SRDS2
2016 Model Checking Software with First Order Logic Specifications Using AIG Solvers
abstract
Static verification techniques leverage Boolean formula satisfiability solvers such as SAT and SMT solvers that operate on conjunctive normal form and first order logic formulae, respectively, to validate programs. They force bounds on variable ranges and execution time and translate the program and its specifications into a Boolean formula. They are limited to programs of relatively low complexity for the following reasons. (1) A small increase in the bounds can cause a large increase in the size of the translated formula. (2) Boolean satisfiability solvers are restricted to using optimizations that apply at the level of the formula. Finally, (3) the Boolean formulae often need to be regenerated with higher bounds to ensure the correctness of the translation. We present a method that uses And-Inverter-Graph (AIG) sequential circuits, and AIG synthesis and verification frameworks to validate programs. An AIG is a Boolean formula with memory elements, logically complete negated conjunction gates, and a hierarchical structure. Encoding the validation problem of a program as an AIG (1) typically provides a more succinct representation than a Boolean formulae encoding with no memory elements, (2) preserves the high-level structure of the program, and (3) enables the use of a number of powerful automated analysis techniques that have no counterparts for other Boolean formulae such as CNF. Our method takes an imperative program with a first order logic specification consisting of a precondition and a postcondition pair, and a bound on the program variable ranges, and produces an AIG with a designated output that is${true}$when the program violates the specification. Our method uses AIG synthesis reduction techniques to reduce the AIG, and then uses AIG verification techniques to check the satisfiability of the designated output. The results show that our method can validate designs that are not possible with other state of the art techniques, and with bounds that are an order of magnitude larger.
Mohammad A. Noureddine, Fadi A. Zaraket
IEEE Trans. Software Eng.1